Mask pattern for hole patterning and method for fabricating semiconductor device using the same
AssigneeSK hynix Inc.
InventorsJun-Hyeub Sun, Sung-Kwon Lee, Sang-Oh Lee
Life of this patent
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AssigneeSK hynix Inc.
InventorsJun-Hyeub Sun, Sung-Kwon Lee, Sang-Oh Lee
Estimating the term…
A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns.
A mask pattern suitable for patterning holes in a cell matrix region, the mask pattern comprising:
Dependencies are inferred from the claim text.