Method for fabricating multiple layers of ultra narrow silicon wires

A method for fabricating multiple layers of ultra narrow silicon wires, wherein the method comprises the following steps:

• A. fabricating wet-etch masking layers for silicon, wherein multiple layers of wet-etch masking layers are formed at sidewalls of a fin-shaped silicon island Fin that is to be formed by step B3, wherein the step comprises:
• A1. depositing a sacrificial layer on a silicon substrate;
• A2. depositing a wet-etch masking layer on the sacrificial layer;
• A3. repeating the steps A1 and A2 alternately to form a periodic stack structure of the sacrifice layer—the masking layer;
• B. forming the Fin and source/drain regions located at both ends thereof by an epitaxy process, wherein the epitaxy process is performed on the silicon substrate to form the Fin and source/drain regions connected to both ends thereof, and wherein the step comprises:
• B1. defining an epitaxy window for the Fin and the source/drain regions by photolithography on the periodic stack structure of the sacrificial layer—the masking layer formed in the step A3;
• B2. performing an anisotropic etching process to transfer patterns defined by the photolithography onto the stack structure of the sacrificial layer—the masking layer and to expose the silicon substrate;
• B3. forming the Fin and the source/drain regions connected to both ends of the Fin within the etched epitaxy window formed in the step B2 by an epitaxy process, wherein the epitaxial silicon has a greater thickness than the total thickness of the stack structure of the sacrificial layer—the masking layer;
• B4. removing the silicon on top of the wet-etch masking layer by chemical mechanical polishing to expose the wet-etch masking layer;
• B5. depositing a wet-etch masking layer on top of the Fin and the source/drain regions connected to both ends of the Fin, which are formed by the epitaxy process;
• B6. defining a wet-etch window for the silicon by photolithography on the periodic stack structure of the sacrificial layer—the masking layer;
• B7. performing an anisotropic etching process to transfer patterns defined by photolithography onto the stack structure of the sacrificial layer—the masking layer and to expose the silicon substrate;
• B8. removing the sacrificial layer by wet-etch;
• C. forming the multiple layers of ultra narrow silicon wires, wherein anisotropic wet etch is performed from the sidewalls of the Fin, so that the wet-etch self-stops at (111) crystal plane under protection of the wet-etch masking layer at the sidewalls, and multiple layers of ultra narrow silicon wires each having a polygonal cross section are formed, and then the area of the cross section is further reduced by sacrificial oxidation to form a circular cross section, and wherein the step comprises:
• C1. forming multiple layers of ultra narrow silicon wires each having a polygonal cross section by anisotropic wet etch;
• C2. removing the masking layer by wet etch;
• C3. forming multiple layers of ultra narrow silicon wires each having a circular cross section by sacrificial oxidation;
• C4. removing the sacrificial oxidation layer wrapping the ultra narrow silicon wire by isotropic wet etch.