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US 9,425,055 B2Granted
Split gate memory cell with a layer of nanocrystals with improved erase performance
AssigneeFreescale Semiconductor, Inc.
InventorsBrian A. Winstead, Ko-Min Chang, Craig T. Swift
Life of this patent
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Abstract
A semiconductor device includes a semiconductor substrate, a charge storage stack over a portion of the substrate. The charge storage stack includes a first dielectric layer, a layer of nanocrystals in contact with the first dielectric layer, a second dielectric layer over and in contact with the layer of nanocrystals, a nitride layer over and in contact with the second dielectric layer, and a third dielectric layer over the nitride layer.
Claims15
A semiconductor device comprising:
- a semiconductor substrate;
- a charge storage stack over a portion of the substrate, the charge storage stack including:
- a first dielectric layer;
- a layer of nanocrystals in contact with the first dielectric layer;
- a second dielectric layer over and in contact with the layer of nanocrystals;
- a nitride layer over and in contact with the second dielectric layer;
- and
- a third dielectric layer over the nitride layer, wherein the nanocrystals are between 5 and 20 nanometers thick, the nitride layer is less than or equal to 20 Angstroms thick, the second dielectric layer is between 20 and 30 Angstroms thick, and the third dielectric layer is between 80 and 120 Angstroms thick.
5 more elements
A non-volatile memory device comprising:
- an array of memory cells on a semiconductor substrate, each of the memory cells including:
- a charge storage stack including:
- a first dielectric layer;
- a layer of nanocrystals in contact with the first dielectric layer;
- a second dielectric layer over the layer of nanocrystals;
- a nitride layer over the second dielectric layer;
- and
- a third dielectric layer over the nitride layer, wherein nanocrystals are between 5 and 20 nanometers thick, the nitride layer is less than or equal to 20 Angstroms thick, the second dielectric layer is between 20 and 30 Angstroms thick, and the thickness of the third dielectric layer is greater than a combined thickness of the second dielectric layer and the nitride layer.
5 more elements
A method of making a non-volatile memory device comprising:
- forming a charge storage stack over a semiconductor substrate including:
- forming a first dielectric layer;
- forming a layer of nanocrystals over the first dielectric layer;
- depositing a second dielectric layer over the layer of nanocrystals;
- depositing a nitride layer over the second dielectric layer;
- and
- depositing a third dielectric layer over the nitride layer, wherein the nanocrystals are between 5 and 20 nanometers thick, the nitride layer is less than or equal to 20 Angstroms thick, the second dielectric layer is between 20 and 30 Angstroms thick, and the third dielectric layer is between 80 and 120 Angstroms thick.
4 more elements
Dependencies are inferred from the claim text.