High mobility power metal-oxide semiconductor field-effect transistors
AssigneeVishay-Siliconix
InventorsDeva Pattanayak, Kuo-In Chen, The-Tu Chau
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Abstract
High mobility P-channel power metal oxide semiconductor field effect transistors. In accordance with an embodiment of the present invention, a power MOSFET is fabricated such that the holes flow in an inversion/accumulation channel, which is along the (110) crystalline plane, or equivalents, and the current flow is in the [110] direction, or equivalents, when a negative potential is applied to the gate with respect to the source. The enhanced channel mobility of holes leads to a reduction of the channel portion of the on-state resistance, thereby advantageously reducing total “on” resistance of the device.
Claims5
A vertical trench silicon MOSFET comprising:
- a (110) wafer including:
- an orientation flat;
- a trench perpendicular to the orientation flat of the (110) wafer, wherein the trench includes a plurality of trench surfaces;
- and
- a channel, wherein the orientation flat is a [111] directed flat, and wherein the trench surfaces are bounded by {111} equivalent planes.
A channel structure for a vertical DMOSFET comprising:
- a (110) wafer including:
- an orientation flat;
- a trench perpendicular to the orientation flat of the (110) wafer, wherein the trench includes a plurality of trench surfaces;
- and
- a P channel, wherein the orientation flat is a [111] directed flat, and wherein the trench surfaces are bounded by {111} equivalent planes.
A p channel power MOSFET structure comprising:
- a (110) wafer including:
- an orientation flat;
- a gate;
- a source;
- a trench perpendicular to the orientation flat of the (110) wafer, wherein the trench includes a plurality of trench surfaces;
- and
- an inversion/accumulation channel, wherein the flat is a [111] directed flat, and wherein the trench surfaces are bounded by {111} equivalent planes.
A semiconductor comprising:
- a (110) wafer including:
- an orientation flat;
- vertical DMOSFET means comprising:
- a trench perpendicular to the orientation flat of the (110) wafer, wherein the trench includes a plurality of trench surfaces;
- and
- P channel means, wherein the orientation flat is a [111] directed flat, and wherein the trench surfaces are bounded by {111} equivalent planes.
A p channel power MOSFET structure comprising:
- a (110) wafer including:
- an orientation flat;
- gate means;
- source means;
- a trench perpendicular to the orientation flat of the (110) wafer, wherein the trench includes a plurality of trench surfaces;
- and
- inversion/accumulation channel means, wherein the orientation flat is a [111] directed flat, and wherein the trench surfaces are bounded by {111} equivalent planes.
Dependencies are inferred from the claim text.