Amplifier dynamic bias adjustment for envelope tracking

A circuital arrangement comprising:

• an amplifier comprising:
• stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors;
• an input port operatively connected to a gate terminal of an input transistor of the stacked transistors;
• an output port operatively connected to a drain terminal of an output transistor of the stacked transistors;
• and
• a reference terminal operatively coupling the input transistor to a reference potential,
• wherein:
• the stacked transistors comprise two subsets of transistors operatively arranged in series, a first subset comprising the input transistor operatively connected between the reference potential at the reference terminal and a second subset, the second subset comprising one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor,
• the variable output supply bias voltage or current is operatively generated from an envelope signal of an input signal, and
• at least one of the plurality of the dynamic bias voltages or currents is operatively generated from the variable output supply bias voltage or current using a gate modifier function, wherein the gate modifier function comprises at least one of:
• a) a scaling function, b) an amplitude shifting function, c) a phase shifting function, and d) an inverting function.

A method of amplifying a signal in a circuital arrangement, the method comprising:

• providing an amplifier comprising stacked transistors in a cascode configuration;
• adapting the arrangement to operatively connect a plurality of bias supplies to a plurality of gate terminals in correspondence of the stacked transistors and to a drain terminal in correspondence of a drain of an output transistor of the stacked transistors;
• applying an input signal to an input port of the arrangement operatively connected to an input transistor of the stacked transistors;
• varying a bias supply of the plurality of bias supplies in correspondence of the drain of the output transistor,
• and
• impressing a desired amplification on the input signal to obtain an amplified output signal by varying at least one bias supply of the plurality of bias supplies in correspondence of the gate terminals, wherein varying the at least one bias supply comprises applying to a gate terminal in correspondence of the at least one bias supply a signal obtained by applying at least one of:
• a) a scaling function, b) an amplitude shifting function, c) a phase shifting function, and d) an inverting function, to an envelope signal of the input signal.

A circuital arrangement comprising:

• an amplifier configured to operate in at least one of:
• a) linear region, b) compression region, or c) switching between compression and linear regions, the amplifier comprising:
• stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors;
• an input port operatively connected to a gate terminal of an input transistor of the stacked transistors;
• an output port operatively connected to a drain terminal of an output transistor of the stacked transistors;
• a reference terminal operatively coupling the input transistor to a reference potential;
• and
• a variable voltage or current source operatively coupled to the arrangement and configured to output a first variable voltage or current and a second variable voltage or current according to a control signal applied to the variable voltage or current source,
• wherein:
• the stacked transistors comprise two subsets of transistors operatively arranged in series, a first subset comprising the input transistor operatively connected between the reference potential at the reference terminal and a second subset, the second subset comprising one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor,
• the dynamic bias voltages or currents are operatively generated from the first variable voltage or current, and the variable output supply bias voltage or current is operatively generated from the second variable voltage or current, and
• the control signal is a function of an envelope signal of an input signal to the amplifier, such as the applying of the control signal to the variable voltage or current source impresses said function upon the first variable voltage or current and the second variable voltage or current output by the variable voltage or current source, the variable voltage or current source comprising a DC-DC converter.

A circuital arrangement comprising:

• an amplifier configured to operate in at least one of:
• a) linear region, b) compression region, or c) switching between compression and linear regions, the amplifier comprising:
• stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors;
• an input port operatively connected to a gate terminal of an input transistor of the stacked transistors;
• an output port operatively connected to a drain terminal of an output transistor of the stacked transistors;
• a reference terminal operatively coupling the input transistor to a reference potential;
• and
• a variable voltage or current source operatively coupled to the arrangement and configured to output a first variable voltage or current and a second variable voltage or current according to a control signal applied to the variable voltage or current source,
• wherein:
• the stacked transistors comprise two subsets of transistors operatively arranged in series, a first subset comprising the input transistor operatively connected between the reference potential at the reference terminal and a second subset, the second subset comprising one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor,
• the dynamic bias voltages or currents are operatively generated from the first variable voltage or current, and the variable output supply bias voltage or current is operatively generated from the second variable voltage or current, and
• the control signal is a function of an envelope signal of an input signal to the amplifier, such as the applying of the control signal to the variable voltage or current source impresses said function upon the first variable voltage or current and the second variable voltage or current output by the variable voltage or current source, the variable voltage or current source comprising a DC-DC converter and a linear regulator operatively connected in parallel or in series.