US 9,407,221 B2Granted

Differential amplifier circuit

AssigneeKabushiki Kaisha Toshiba

InventorsTetsuro Itakura, Masanori Furuta, Shunsuke Kimura, Go Kawata, Hideyuki Funaki

Life of this patent

Estimating the term…

Loading patent…

Abstract

In one embodiment, a differential amplifier circuit includes a first input terminal, a second input terminal, a first transistor, a second transistor, a third transistor, a current source, a first output terminal, a second output terminal, a first passive element, and a second passive element. The first (second) transistor has a control terminal connected to the first (second) input terminal. The third transistor has a control terminal. The control terminal is applied predetermined bias voltage. The current source is connected to a first terminal in each of the first transistor, second transistor, and third transistor. The first (second) output terminal is connected to a second terminal of the first (second) transistor. The first (second) passive element is connected between the first (second) input terminal and the first (second) output terminal.

Claims7

Dependent claims

A differential amplifier circuit, comprising:

a first input terminal;
a second input terminal;
a first transistor having a control terminal connected to the first input terminal;
a second transistor having a control terminal connected to the second input terminal;
a third transistor having a control terminal applied predetermined bias voltage;
a current source connected to a first terminal of each of the first transistor, the second transistor, and the third transistor;
a first output terminal connected to a second terminal of the first transistor;
a second output terminal connected to a second terminal of the second transistor;
a first passive element connected between the first input terminal and the first output terminal;
a second passive element connected between the second input terminal and the second output terminal;
and
a load circuit connected to the second terminal of each of the first transistor and the second transistor;
wherein the load circuit is a current mirror circuit configured to copy current flowing in the third transistor and apply the current to the first transistor and the second transistor.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/528,196Filed 30 Oct 2014
Priority: JP 2013-23531113 Nov 2013
Published: US 2015/0130538 A114 May 2015
Granted: 2 Aug 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification13 codes

H03F 3/45183
Using MOSFET transistors as the active amplifying circuit: long tailed pairs
H03F 3/45188
Long tailed pairs: non-folded cascode stages
H03F 3/45475
Characterised by the way of implementation of the active amplifying circuit in the differential amplifier: using IC blocks as the active…
H03F 3/45654
Measuring at the loading circuit of the differential amplifier: controlling the active amplifying circuit of the differential amplifier