Semiconductor device

A semiconductor device, comprising:

• first and second active regions spaced apart from each other in a first direction with a field insulating layer interposed therebetween and having respective tops formed on the same plane;
• a first wire pattern formed on the first active region and extended in the first direction;
• a second wire pattern formed on the second active region and extended in the first direction, wherein a height of the second wire pattern from the tops of the first and second active regions is substantially the same as that of the first wire pattern;
• a first normal gate formed on the first active region and extended in a second direction different from the first direction and covering the first wire pattern;
• a second normal gate formed on the second active region and extended in the second direction and covering the second wire pattern;
• a first dummy gate having a first part which overlaps a first end of the field insulating layer and a second part which overlaps the first active region, wherein the first dummy gate is formed on the first active region and spaced apart from the first normal gate in the first direction;
• and
• a second dummy gate having a first part which overlaps a second end of the field insulating layer and a second part which overlaps the second active region, wherein the second dummy gate is formed on the second active region and spaced apart from the second normal gate in the first direction,
• wherein the first wire pattern penetrates a third part of the first dummy gate and the first dummy gate covers a first end of the first wire pattern, and
• the second wire pattern penetrates a third part of the second dummy gate and the second dummy gate covers a first end of the second wire pattern.

A semiconductor device, comprising:

• a source or drain region formed on a substrate;
• a normal gate and a dummy gate formed on the substrate and spaced apart from each other in a first direction with the source or drain region interposed therebetween and extended in a second direction crossing the first direction;
• and
• a wire pattern which protrudes from first and second sides of the source or drain region in the first direction,
• wherein a width of a region where the wire pattern and the normal gate overlap each other in the first direction is different from a width of a region where the wire pattern and the dummy gate overlap each other in the first direction.

A semiconductor device, comprising:

• a first normal gate disposed on an active region of a substrate;
• a first dummy gate disposed on the substrate at a first side of the first normal gate;
• a first source or drain disposed between the first normal gate and the first dummy gate and on the active region;
• a second dummy gate disposed on the substrate at a second side of the first normal gate;
• a second source or drain disposed between the first normal gate and the second dummy gate;
• a first wire pattern covered by the first normal gate, the first dummy gate and the second dummy gate;
• and
• a second wire pattern covered by the first normal gate, the first dummy gate and the second dummy gate.