High density interconnection of microelectronic devices

A computing device, comprising:

• a board;
• and
• at least one of a processor and a communication chip electrically coupled to the board wherein the at least one of a processor and a communication chip comprises a microelectronic package including:
• a first microelectronic device having at least one row of connection structures electrically connected thereto;
• a second microelectronic device having at least one row of connection structures electrically connected thereto, wherein at least one connection structures within the at least one first microelectronic device row is aligned with a corresponding connection structure within the at least one second microelectronic device row in an x-direction;
• and
• an interconnect comprising an interconnect substrate having a plurality of electrically isolated conductive traces extending in the x-direction on a first surface of the interconnect substrate, wherein the interconnect is attached to the at least one first microelectronic device connection structure row and the at least one second microelectronic device connection structure row, such that at least one interconnect conductive trace forms a connection between a first microelectronic device connection structure and its corresponding second microelectronic device connection structure;
• wherein the first microelectronic device has at least a first row and a second row of connection structures electrically connected thereto, wherein the second microelectronic device has at least a first row and a second row of connection structures electrically connected thereto, and wherein at least one interconnect conductive trace forms a connection between one first microelectronic device connection structure in the first microelectronic device first row and at least one connection structure in at least one of the first row and the second row of the second microelectronic device and wherein at least one interconnect conductive trace forms a connection between one second microelectronic device connection structure in the second microelectronic device first row and at least one connection structure in at least one of the first row and the second row of the first microelectronic device.