MEMS and CMOS integration with low-temperature bonding

A method of forming an integrated chip, comprising:

• selectively etching a first side of a carrier substrate to form one or more cavities;
• bonding the first side of the carrier substrate to a dielectric layer disposed on a micro-electromechanical system (MEMS) substrate;
• forming one or more bonding layers on the MEMS substrate;
• selectively patterning the MEMS substrate to define one or more soft mechanical structures over the one or more cavities;
• selectively etching the dielectric layer by a dry etching process to release the one or more soft mechanical structures;
• and
• bonding a CMOS substrate to a second side of the MEMS substrate at a temperature of less than approximately 400° C., wherein bonding the CMOS substrate to the MEMS substrate causes the one or more bonding layers to form a bonding structure comprising an intermetallic compound disposed between the CMOS substrate and the MEMS substrate.

A method of forming an integrated chip, comprising:

• forming a cavity within a first side of a carrier substrate;
• bonding the first side of the carrier substrate to a dielectric layer disposed on a micro-electromechanical system (MEMS) substrate;
• selectively patterning the MEMS substrate to form one or more openings extending through the MEMs substrate to contact the dielectric layer at a location above the cavity;
• selectively etching the dielectric layer between the MEMs substrate and the cavity using an etchant that contacts the dielectric layer through the openings;
• and
• bonding a CMOS substrate to a second side of the MEMS substrate by way of a bonding structure disposed between the CMOS substrate and the MEMS substrate.