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US 9,385,074 B2Granted
Semiconductor package with embedded die
AssigneeSTATS ChipPAC Pte. Ltd.
InventorRajendra D. Pendse
Life of this patent
Estimating the term…
Abstract
A semiconductor package having an embedded die and solid vertical interconnections, such as stud bump interconnections, for increased integration in the direction of the z-axis (i.e., in a direction normal to the circuit side of the die). The semiconductor package can include a die mounted in a face-up configuration (similar to a wire bond package) or in a face-down or flip chip configuration.
Claims26
A method of making a semiconductor device, comprising:
- providing a semiconductor die;
- forming a conductive layer in a peripheral region around the semiconductor die;
- and
- forming a first stud bump over the conductive layer by pressing a wire over the conductive layer under temperature to flatten an end of the wire and form an enlarged base portion covering a top surface and side surface of the conductive layer.
1 more element
A method of making a semiconductor device, comprising:
- providing a semiconductor die;
- forming a conductive layer in a peripheral region around the semiconductor die;
- forming a first stud bump over the conductive layer to include an enlarged base portion covering a side surface of the conductive layer and a stem portion extending from the enlarged base portion using a wire bonding tool;
- and
- depositing an encapsulant over the semiconductor die and first stud bump.
2 more elements
A semiconductor device, comprising:
- a semiconductor die;
- a first conductive layer formed in a peripheral region around the semiconductor die;
- and
- a first stud bump formed over the first conductive layer, the first stud bump including an enlarged base portion to cover a top surface and side surface of the first conductive layer and a stem portion extending from the enlarged base portion, wherein the stem portion includes a truncated cone shape.
1 more element
A semiconductor device, comprising:
- a semiconductor die including an active surface, a back surface opposite the active surface and a side surface disposed between the active surface and the back surface;
- a first conductive layer formed in a peripheral region around the semiconductor die;
- a first stud bump formed over the first conductive layer, the first stud bump including a base width greater than a width of the first conductive layer;
- and
- an encapsulant deposited over the semiconductor die and first stud bump, wherein the side surface of the semiconductor die is exposed from the encapsulant.
2 more elements
A semiconductor device, comprising:
- a semiconductor die;
- a first conductive layer formed in a peripheral region around the semiconductor die;
- a first stud bump formed over the first conductive layer, the first stud bump including an enlarged base portion to cover a side surface of the first conductive layer and a stem portion extending from the enlarged base portion;
- and
- an encapsulant deposited over the semiconductor die and first stud bump.
2 more elements
Dependencies are inferred from the claim text.