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US 9,380,134 B2Granted
RoCE packet sequence acceleration
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsParav Pandit, Masoodur Rahman, Kenny Meng-Hung Wu, Chaitanya Tumuluri
Life of this patent
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Abstract
A method, network device and system for remote direct memory access (RDMA) over Converged Ethernet (RoCE) packet sequence acceleration are disclosed. The network device comprises one or more components for communicating with a host system. A network communication protocol, such as RoCE, is implemented by a combination of the one or more components and the host system.
Claims14
A system of accelerating transmission of a packet sequence over a network, the system comprising:
- a host software stack implementing a partial offload of one or more functionalities defined by a network communication protocol comprising Remote Direct Memory Access (RDMA);
- and
- a device coupled to the host software stack and comprising hardware configured to support the partial offload, the device comprising a transmit interface configured to receive a request for transmitting a packet sequence from the host software stack and generate a transmit descriptor based on the request, the transmit descriptor including information for creating individual packets from the packet sequence, each packet having a format defined by the network communication protocol,
- the transmit descriptor comprising header information, a total transmit size of the packet sequence, a frame size for each packet to be created, a start point of packet sequence number (PSN) and a list of host buffers for obtaining payload data,
- the device comprising a transmit offload processor coupled to the transmit interface and configured for receiving the transmit descriptor from the transmit interface,
- the transmit offload processor creating the individual packets from the packet sequence based on the information in the transmit descriptor,
- the transmit offload processor also creating an Ethernet header, a Global Routing Header (GRH) and one or more transport layer headers for each packet frame based on the header information in the transmit descriptor.
4 more elements
A network device comprising:
- a transmit interface operable to read, from a host memory, a transmit request and associated header information, the associated header information comprising a packet sequence number (PSN) and a list of host buffers for obtaining payload data;
- and
- an offload processor operable to generate, in response to the transmit request, a data packet, the offload processor being operable to transmit the data packet over a data network to at least one data network address,
- the data packet comprising the associated header information and being generated according to a direct memory access protocol,
- the transmit descriptor comprising the associated header information, a total transmit size of the packet sequence, a frame size for each packet to be created, the packet sequence number (PSN) and the list of host buffers for obtaining payload data,
- the offload processor being coupled to the network interface and being configured for receiving the transmit descriptor from the network interface and being configured for creating the data packet based on the information in the transmit descriptor,
- the offload processor creating an Ethernet header, a Global Routing Header (GRH) and one or more transport layer headers based on the header information in the transmit descriptor.
4 more elements
A network device comprising:
- an interface operably coupled to a host, the host implementing one or more elements of a Remote Direct Memory Access (RDMA) protocol;
- and
- an offload processor operably coupled to the interface, the offload processor being a hardware device configured to receive a request for transmitting a packet sequence from the host and configured generate a transmit descriptor based on the request, the transmit descriptor including information for creating individual packets from the packet sequence, each individual packet having a format defined by the RDMA protocol,
- the transmit descriptor comprising header information, a total transmit size of the packet sequence, a frame size for each packet to be created, a start point of packet sequence number (PSN) and a list of host buffers for obtaining payload data,
- the device comprising a transmit offload processor coupled to the transmit interface and configured for receiving the transmit descriptor from the transmit interface,
- the transmit offload processor creating the individual packets from the packet sequence based on the information in the transmit descriptor,
- the transmit offload processor also creating an Ethernet header, a Global Routing Header (GRH) and one or more transport layer headers for each packet frame based on the header information in the transmit descriptor.
4 more elements
Dependencies are inferred from the claim text.