Parameterized digital divider

A non-transitory computer-readable medium comprising instructions that, when executed by a processing device, cause the processing device to perform a method of performing digital division, the method comprising:

• right-shifting, by a right-shift circuit during a clock cycle, a divider to provide a temporary divider;
• determining, by a determination circuit and during the clock cycle, a temporary dividend based on at least one of a dividend and a difference between the divider and the dividend;
• subtracting, by a subtraction circuit, the temporary divider from the temporary dividend to provide an updated difference for the clock cycle;
• and
• left-shifting, by a left-shift circuit, a quotient based on the updated difference for the clock cycle.

A digital divider, comprising:

• a right-shift circuit, the right-shift circuit providing a temporary divider during a clock cycle based on a divider;
• a determination circuit, the determination circuit providing the temporary dividend during the clock cycle based on at least one of a dividend and a difference between the divider and the dividend;
• a subtraction circuit, the subtraction circuit subtracting the temporary divider from the temporary dividend to provide an updated difference for the clock cycle;
• and
• a left-shift circuit, the left-shift circuit providing a quotient based on the updated difference for the clock cycle.