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US 9,368,572 B1Granted
Vertical transistor with air-gap spacer
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Tak H. Ning
Life of this patent
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Abstract
A vertical transistor has a first air-gap spacer between the gate and the bottom source/drain, and a second air-gap spacer between the gate and the contact to the bottom source/drain. A dielectric layer disposed between the gate and the contact to the top source/drain decreases parasitic capacitance and inhibits electrical shorting.
Claims7
A method of making a vertical transistor, comprising:
- forming a fin or a vertical nanowire over a semiconductor substrate;
- forming a gate electrode over sidewalls of the fin or vertical nanowire;
- forming a sacrificial spacer over the gate electrode;
- forming a bottom source/drain contact adjacent to the sacrificial spacer;
- removing the sacrificial spacer to create a cavity between the gate electrode and the bottom source/drain contact;
- non-conformally depositing a dielectric material into the cavity and between the gate electrode and the substrate, wherein the dielectric material comprises a vertical air-gap and the dielectric material between the gate electrode and the substrate comprises a horizontal air-gap.
3 more elements
Dependencies are inferred from the claim text.