Resistor memory bit-cell and circuitry and method of making the same

A semiconductor memory control unit comprising:

• a semiconductor substrate having a first surface and a second surface opposite the first surface;
• a switching transistor;
• and
• a resistive memory cell;
• wherein the switching transistor comprises:
• a gate disposed over the first surface of the semiconductor substrate;
• a source and a drain each disposed in the semiconductor substrate, the drain comprising a first drain portion in the vicinity of the first surface and a second drain portion in the vicinity of the second surface;
• a gate terminal disposed over the first surface and connected to the gate,
• a source terminal disposed over the first surface and connected to the source,
• a drain terminal disposed over the second surface of the semiconductor substrate and connected to the drain, and
• wherein the resistive memory cell is disposed over the second surface and has a first end connected to the drain terminal.