Buffer-less rotating coefficient filter
AssigneeESS Technology, Inc.
InventorA. Martin Mallinson
Life of this patent
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AssigneeESS Technology, Inc.
InventorA. Martin Mallinson
Estimating the term…
A circuit that provides a rotating coefficient FIR filter with all necessary coefficient sets present at the same time, without the need for delay elements, devices providing for adjustable impedances, or buffers is described. An input signal is sampled in a round robin fashion by a plurality of switches and capacitors. The capacitors are connected directly to sets of impedance devices. Each set of impedance devices implements the coefficients of the desired frequency response of the filter, adjusted to compensate for the decay of samples in the capacitors between samples. The impedance devices in each set are connected to the capacitors in a different order from each other set, so that each set of impedance devices will produce the desired frequency response when a different one of the capacitor contains a new sample of the input signal. Switches connect the sets of impedance devices to an output and a virtual ground, only one switch being connected to the output at a time to provide the output signal.
A circuit comprising:
The circuit of claim wherein the elements having impedances are inductors.
A method of designing a finite impulse response filter having a plurality of sampling circuits arranged in parallel for sampling the input signal in response to a timing signal, each sampling circuit consisting of a capacitor and a switch that connects the capacitor to the input signal, the sampling circuits configured such that successive sampling circuits create samples of the input signal in time-delayed succession at pre-determined intervals, comprising:
A computer readable storage medium having embodied thereon instructions for causing a computing device to execute a method for designing a finite impulse response filter having a plurality of sampling circuits arranged in parallel for sampling the input signal in response to a timing signal, each sampling circuit consisting of a capacitor and a switch that connects the capacitor to the input signal, the sampling circuits configured such that successive sampling circuits create samples of the input signal in time-delayed succession at pre-determined intervals, the method comprising:
Dependencies are inferred from the claim text.