Imagers with improved analog-to-digital circuitry
AssigneeSemiconductor Components Industries, LLC
InventorsHai Yan, Kwang-bo Cho
Life of this patent
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Abstract
An imager may include an array of pixels. The pixel array may be arranged in rows and columns. Each pixel of the pixel array may include a photodiode that is coupled to a floating diffusion region by a transfer gate. A source-follower transistor may be coupled between the floating diffusion region and a pixel output node. The imager may include ramp circuitry that provides a ramp signal to the floating diffusion region. A capacitor interposed between the ramp circuitry and the floating diffusion region may be used in conveying the ramp signal to the floating diffusion region. The pixel may be coupled to a comparator that is implemented using separate circuitry or may include portions of the pixel.
Claims16
A pixel array, comprising:
- an imaging pixel having a floating diffusion region;
- and
- ramp circuitry that provides a ramp signal to the floating diffusion region of the imaging pixel, wherein the imaging pixel comprises
- a photodiode;
- a transfer gate that is coupled between the photodiode and the floating diffusion region;
- a source-follower transistor having a gate terminal coupled to the floating diffusion region;
- supply circuitry;
- a row select transistor coupled between the ramp circuitry and the floating diffusion region;
- and
- a reset transistor coupled between the floating diffusion region and the supply circuitry wherein the reset transistor has a gate terminal that receives a reset signal, wherein the supply circuitry provides a control signal to a source-drain terminal of the reset transistor, and wherein the reset transistor uses the reset signal and the control signal to selectively enable and disable the source-follower transistor.
An image pixel, comprising:
- a photodiode;
- a transfer gate that is coupled between the photodiode and a floating diffusion region;
- a source-follower transistor coupled to the floating diffusion region;
- a capacitor coupled between the floating diffusion region and a ramp signal path;
- and
- a row select transistor having a first source-drain terminal coupled to the ramp signal path and a second source-drain terminal coupled to the capacitor, wherein the row select transistor is coupled between the ramp signal path and the floating diffusion region.
A system, comprising:
- a central processing unit;
- memory;
- input-output circuitry;
- and
- an imaging device, wherein the imaging device comprises:
- a pixel array;
- ramp circuitry that produces at least one ramp signal;
- and
- a lens that focuses an image on the pixel array, wherein each pixel of the pixel array comprises:
- a photodiode;
- a storage node that stores charge collected by the photodiode and receives the ramp signal;
- a source-follower transistor coupled between the storage node and a pixel output;
- a capacitor coupled between the storage node and the ramp circuitry;
- and
- a row select transistor having a first source-drain terminal coupled to the ramp circuitry and a second source-drain terminal coupled to the capacitor, wherein the row select transistor is coupled between the ramp circuitry and the storage node.
Dependencies are inferred from the claim text.