Octal serial gigabit media-independent interface

A method comprising, by one or more computer systems:

• receiving, from a single chip, eight parallel data streams having a first data rate;
• multiplexing by round-robin selection the eight parallel data streams into a first single multiplexed data stream having the eight parallel data streams;
• maintaining DC bias on the multiplexed data stream having the eight parallel data streams by encoding the multiplexed data stream having the eight parallel data streams using a single self-synchronous scrambler;
• serializing the modified multiplexed data stream, by a single serializer/deserializer chip, into a serial data stream having a second data rate that is approximately equal to ten times the first data rate;
• transmitting to a receiver the serial data stream at the second data rate;
• receiving, at the receiver coupled to a transmitter, the serial data stream;
• de-serializing, by a single serializer/deserializer chip, the serial data stream into a second single multiplexed data stream;
• de-multiplexing, through a de-multiplexer, the second single multiplexed data stream into eight received parallel data streams;
• and
• decoding each of said eight received parallel data streams.

One or more computer-readable non-transitory storage media embodying software that is operable when executed to:

• receive, from a single chip, eight parallel data streams having a first data rate;
• multiplex by round-robin selection the eight parallel data streams into a single multiplexed data stream having the eight parallel data streams;
• maintain DC bias on the multiplexed data stream having the eight parallel data streams by encoding the multiplexed data stream having the eight parallel data streams using a single self-synchronous scrambler;
• serialize the modified multiplexed data stream, by a single serializer/deserializer chip, into a serial data stream having a second data rate that is approximately equal to ten times the first data rate;
• and
• transmit to a receiver the modified serial data stream at the second data rate.

One or more computer-readable non-transitory storage media embodying software that is operable when executed to:

• receive, from a single chip, eight parallel data streams having a first data rate;
• multiplex by round-robin selection the eight parallel data streams into a first single multiplexed data stream having the eight parallel data streams;
• maintain DC bias on the multiplexed data stream having the eight parallel data streams by encoding the multiplexed data stream having the eight parallel data streams using a single self-synchronous scrambler;
• serialize the modified multiplexed data stream, by a single serializer/deserializer chip, into a serial data stream having a second data rate that is approximately equal to ten times the first data rate;
• transmit to a receiver the serial data stream at the second data rate;
• receive, at the receiver coupled to a transmitter, the serial data stream;
• de-serialize, by a single serializer/deserializer chip, the serial data stream into a second single multiplexed data stream;
• de-multiplex, through a de-multiplexer, the second single multiplexed data stream into eight received parallel data streams;
• and
• decode each of said eight received parallel data streams.

A system comprising:

• means for receiving, from a single chip, eight parallel data streams having a first data rate;
• means for multiplexing by round-robin selection the eight parallel data streams into a single multiplexed data stream having the eight parallel data streams;
• means for maintaining DC bias on the multiplexed data stream having the eight parallel data streams by encoding the multiplexed data stream having the eight parallel data streams using a single self-synchronous scrambler;
• means for serializing the modified multiplexed data stream, by a single serializer/deserializer chip, into a serial data stream having a second data rate that is approximately equal to ten times the first data rate;
• and
• means for transmitting to a receiver the modified serial data stream at the second data rate.

A system comprising:

• means for receiving, from a single chip, eight parallel data streams having a first data rate;
• means for multiplexing by round-robin selection the eight parallel data streams into a first single multiplexed data stream having the eight parallel data streams;
• means for maintaining DC bias on the multiplexed data stream having the eight parallel data streams by encoding the multiplexed data stream having the eight parallel data streams using a single self-synchronous scrambler;
• means for serializing the modified multiplexed data stream, by a single serializer/deserializer chip, into a serial data stream having a second data rate that is approximately equal to ten times the first data rate;
• means for transmitting to a receiver the serial data stream at the second data rate;
• means for receiving, at the receiver coupled to a transmitter, the serial data stream;
• means for de-serializing, by a single serializer/deserializer chip, the serial data stream into a second single multiplexed data stream;
• means for de-multiplexing, through a de-multiplexer, the second single multiplexed data stream into eight received parallel data streams;
• and
• means for decoding each of said eight received parallel data streams.