US 9,319,063 B2Granted

Enhanced multi-processor waveform data exchange using compression and decompression

AssigneeAltera Corporation

InventorAlbert W. Wegener

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Abstract

Configurable compression and decompression of waveform data in a multi-core processing environment improves the efficiency of data transfer between cores and conserves data storage resources. In waveform data processing systems, input, intermediate, and output waveform data are often exchanged between cores and between cores and off-chip memory. At each core, a single configurable compressor and a single configurable decompressor can be configured to compress and to decompress integer or floating-point waveform data. At the memory controller, a configurable compressor compresses integer or floating-point waveform data for transfer to off-chip memory in compressed packets and a configurable decompressor decompresses compressed packets received from the off-chip memory. Compression reduces the memory or storage required to retain waveform data in a semiconductor or magnetic memory. Compression reduces both the latency and the bandwidth required to exchange waveform data. This abstract does not limit the scope of the invention as described in the claims.

Claims24

Dependent claims

A system for processing waveform data, wherein the waveform data comprise samples represented in an integer data format or a floating-point data format, comprising:

a plurality of processor cores and a communications fabric for transfer of data packets among the plurality of processor cores;
compression logic integrated with a source processor core of the plurality of processor cores, wherein the compression logic is operable to compress a plurality of samples from the source processor core in accordance with one or more compression control parameters to form a plurality of compressed samples, the compression logic further including logic to provide the compressed samples to a data portion of a compressed packet and the one or more compression control parameters to a header portion of the compressed packet for transmission on the communication fabric;
and
decompression logic integrated with a destination processor core of the plurality of processor cores, wherein the decompression logic is applied to the compressed packet received from the communication fabric to decompress the compressed samples from the data portion of the compressed packet in accordance with the one or more compression control parameters from the header portion of the compressed packet to form a plurality of decompressed samples.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 14/096,324Filed 4 Dec 2013 · continuation
Priority: 30 Sep 2009
Published: US 2014/0095561 A13 Apr 2014
Granted: 19 Apr 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H03M 7/3059
Compression ; Expansion; Suppression of unnecessary data, e.g. redundancy reduction: digital compression and data reduction techniques where the…
H03M 7/30
Conversion of a code where information is represented by a given sequence or number of digits to a code where the same , similar or subset of…:…
H03M 7/24
Conversion to or from non-weighted codes: conversion to or from floating-point codes
H03M 7/6023
Methods or arrangements to increase the throughput: parallelization

Family

Application61/247,480Us provisional application · filed 30 Sep 2009
Application12/891,312Parent of this continuation · filed 27 Sep 2010
US 2014/0095561 A1Pre-grant publication · published 3 Apr 2014
US 8,631,055 B2Parent of this continuation
US 2011/0078222 A1Published application
US 9,319,063 B2This patent

From the US filing history. Foreign family members aren’t listed.