Digital PLL with hybrid phase/frequency detector and digital noise cancellation

A method comprising:

• performing phase/frequency detection with respect to a reference frequency and a feedback signal;
• performing digital requantization between a fine resolution analog-to-digital conversion for the phase/frequency detection and a course resolution digital-to-analog conversion for interfacing with the feedback signal;
• generating a multiple bit error encoding of phase/frequency error responsive to the detection;
• receiving the multiple bit error encoding at a loop filter;
• and
• controlling a digitally controlled oscillator (DCO) with the loop filter to generate a reference frequency output.

A phase locked loop (PLL) comprising:

• a reference frequency input;
• a phase and frequency detector charge-pump in communication with the reference frequency input;
• a delta sigma analog-to-digital converter (ADC) driven by the charge-pump, the ADC comprising a resolution mode input configured to selectively change the ADC between:
• a fine resolution mode providing a fine mode number of quantization levels for phase and frequency error;
• and
• a coarse resolution mode providing fewer quantization levels for the phase and frequency error than the fine mode number of quantization levels;
• a loop filter following the ADC and configured to accept the phase and frequency error and responsively drive a digitally controlled oscillator (DCO) that generates a reference frequency output;
• and
• a feedback path from the DCO to the charge-pump, the feedback path comprising a multi-modulus divider (MMD).

A phase locked loop (PLL) comprising:

• a reference frequency input;
• a detector in communication with the reference frequency input, the detector comprising:
• a fine resolution encoder configured to output a multiple bit resolution phase/frequency error encoding;
• and
• a phase and frequency detector including an analog to digital converter (ADC), the ADC is configured to selectively operate in:
• a fine resolution mode providing a fine mode number of quantization levels;
• and
• a coarse resolution mode providing fewer quantization levels than the fine mode number of quantization levels;
• a loop filter following the detector and configured to accept the multiple bit resolution error encoding;
• and
• a reference frequency output following the loop filter.