Class-D amplifier having mixed signal feedback control

A circuit, comprising:

• an analog-to-digital converter (ADC) having a non-inverted input node, an inverted input node, and an N-bit digital output port, N being a positive integer;
• a digital filter having an input port and an output port, the input port of the digital filter being coupled to the output port of the ADC;
• a digital pulse width modulation (PWM) unit having an input port, a first PWM output node, and a second PWM output node, the input port of the digital PWM unit being coupled to the output port of the digital filter;
• a first pre-driver unit comprising an input node, a first output node, and a second output node, the input node of the first pre-driver unit being coupled to the first PWM output node;
• a first Class-D output driver having a first input node, a second input node, and an output node, the first input node of the first Class-D output driver being coupled to the first output node of the first pre-driver unit, the second input node of the first Class-D output driver being coupled to the second output node of the first pre-driver unit;
• a first resistive network having a first node and a second node, the first node of the first resistive network coupled to the output node of the first Class-D output driver, and the second node of the first resistive network coupled to the non-inverted input node of the ADC, a first feedback path being defined as from the output node of the first Class-D output driver through the first resistive network to the non-inverted input node of the ADC, and the first feedback path being free from a low-pass filtering device that has a cutoff frequency lower than a sampling frequency of the ADC;
• a second pre-driver unit comprising an input node, a first output node, and a second output node, the input node of the second pre-driver unit being coupled to the second PWM output node;
• a second Class-D output driver having a first input node, a second input node, and an output node, the first input node of the second Class-D output driver being coupled to the first output node of the second pre-driver unit, the second input node of the second Class-D output driver being coupled to the second output node of the second pre-driver unit;
• and
• a second resistive network having a first node and a second node, the first node of the second resistive network coupled to the output node of the second Class-D output driver, and the second node of the second resistive network coupled to the inverted input node of the ADC, a second feedback path being defined as from the output node of the second Class-D output driver through the second resistive network to the inverted input node of the ADC, and the second feedback path being free from a low-pass filtering device that has a cutoff frequency lower than the sampling frequency of the ADC.

A method, comprising:

• generating, by an analog-to-digital converter (ADC), a first digital signal based on a first analog input signal and a first feedback signal;
• generating, by a digital filter, a second digital signal based on the first digital signal;
• generating a first PWM signal based on the second digital signal;
• generating a first set of control signals based on the first PWM signal;
• generating, by a first Class-D output driver, a first output signal based on the first set of control signals;
• generating the first feedback signal based on scaling the first output signal by a predetermined ratio;
• and
• coupling the first feedback signal with the ADC,
• the generating the first feedback signal and the coupling the first feedback signal being performed without performing a low-pass filtering operation that has a cutoff frequency lower than a sampling frequency of the ADC.