Inverse class F amplifiers with intrinsic capacitance compensation

An inverse class F amplifier configured to operate at a fundamental frequency (f0), the inverse class F amplifier comprising:

• a transistor including a transistor output and an intrinsic output capacitance coupled to the transistor output;
• an output inductance including a first node and a second node, the output inductance first node coupled to the transistor output;
• a passive circuit element, the passive circuit element including a first node, and a second node, the passive element first node coupled to the output inductance second node;
• and
• a transmission line including a first node and a second node, the transmission line first node coupled to the passive circuit element second node, and the transmission line second node coupled to a voltage reference, wherein the transmission line has an effective length of about a quarter wavelength of the fundamental frequency (f0) such that the transmission line presents a high impedance to the passive circuit element second node for signals at about the fundamental frequency (f0) and presents a low impedance to the voltage reference to the passive circuit element second node for second harmonic signals at about twice the fundamental frequency (2f0), and wherein the output inductance and the intrinsic output capacitance operate as a parallel inductor-capacitor (LC) circuit having a resonant frequency of about twice the fundamental frequency (2f0) to create a high impedance at the transistor output such that the intrinsic output capacitance is prevented from providing a capacitive reactance path to ground for the second harmonic signals while still providing the capacitive reactance path for third harmonic signals at about three times the fundamental frequency (3f0).

An inverse class F amplifier configured to operate at a fundamental frequency (f0), the inverse class F amplifier comprising:

• a transistor including a transistor output and an intrinsic output capacitance coupled to the transistor output;
• an output inductance including a first node and a second node, the output inductance first node coupled to the transistor output;
• and
• a transmission line including a first node and a second node, the transmission line first node coupled to the output inductance second node, and the transmission line second node coupled to an open node, wherein the transmission line has an effective length of about a quarter wavelength of twice the fundamental frequency (2f0), and wherein the output inductance and the intrinsic output capacitance operate as a parallel inductor-capacitor (LC) circuit having a resonant frequency of about twice the fundamental frequency (2f0) to create a high impedance at the transistor output such that the intrinsic output capacitance is prevented from providing a capacitive reactance path to ground for second harmonic signals at about twice the fundamental frequency (2f0) while still providing the capacitive reactance path for third harmonic signals at about three times the fundamental frequency (3f0).