Tunable capacitor

A tunable capacitor, comprising:

• a variable capacitor unit connected between a first terminal and a second terminal;
• an ESD protection circuit connected either between the first terminal and a ground terminal or between the second terminal and the ground terminal, or connected both between the first terminal and a ground terminal and between the second terminal and the ground terminal;
• and
• a plurality of the variable capacitor units, wherein:
• the plurality of the variable capacitor units are connected in parallel to each other, wherein each of the plurality of the variable capacitor units comprises a first capacitor and a switching transistor which switches on/off the connection of the first capacitor between the first terminal and the second terminal,
• the ESD protection circuit comprises a stacked transistor formed by connecting in series a plurality of MOS transistors,
• a signal is applied to either a gate terminal or a body terminal of each of the plurality of MOS transistors or to both the gate terminal and the body terminal of each MOS transistor, such that each MOS transistor maintains a turn-off state, and
• an equivalent capacitance of the plurality of the variable capacitor units is 2m-1×C1 (here, m is a natural number less than n), wherein width-to-length ratios W/L of the switching transistors of the plurality of the variable capacitor units are 2m-1×W1 (here, m is a natural number less than n) respectively, and wherein the n is a number of the variable capacitor units, wherein the C1 is an equivalent capacitance of a particular variable capacitor unit, and wherein the W1 is a channel width-to-length ratio W/L of the switching transistor.

A tunable capacitor, comprising:

• a variable capacitor unit connected between a first terminal and a second terminal and including:
• a first capacitor having one terminal and another terminal, the one terminal being connected to the first terminal, and
• a switching transistor connected to the another terminal of the first capacitor and configured to switch on/off the connection of the first capacitor between the first terminal and the second terminal;
• and
• an ESD protection circuit including a stacked transistor formed by connecting in series a plurality of MOS transistors, wherein
• a gate terminal and a body terminal of each of the plurality of MOS transistors are connected to the ground terminal, such that each MOS transistor maintains a turn-off state, and
• one of the plurality of MOS transistors is directly connected to the one terminal of the first capacitor.