Method for fabricating a damascene self-aligned ferroelectric random access memory (F-RAM) having a ferroelectric capacitor aligned with a three dimensional transistor structure

A method comprising:

• forming a transistor structure including a contact in a planar surface of a substrate;
• and
• forming a ferroelectric capacitor overlying the transistor structure, the method of forming the ferroelectric capacitor comprising:
• forming an insulating layer over the contact;
• forming an opening in the insulating layer to expose at least a portion of the contact, wherein forming the opening further comprises removing a selected region of the planar surface;
• forming a bottom electrode spacer electrically coupling to the contact, the bottom electrode spacer medially located in the opening and proximal to a sidewall thereof;
• forming an insulating cap in a lower portion of the opening, wherein forming the insulating cap comprises filling the selected region of the planar surface and covering exposed portions of the contact;
• forming a ferroelectric spacer in the opening on the insulating cap and medially of the bottom electrode spacer;
• and
• forming a top electrode spacer in the opening on the insulating cap and medially of the ferroelectric spacer.

A method comprising:

• forming an insulating layer overlying a transistor structure formed in a planar surface of a substrate;
• selectively removing a portion of the insulating layer and a selected region of the planar surface beneath the portion to form an opening exposing a contact to the transistor structure;
• forming a bottom electrode spacer proximal to a sidewall of the opening and electrically coupling to the contact;
• forming an insulating cap in a lower portion of the opening, the insulating cap filling the selected region of the planar surface and covering exposed portions of the contact;
• forming a ferroelectric spacer in the opening over the insulating cap and medially of the bottom electrode spacer;
• and
• forming a top electrode spacer in the opening over the insulating cap and medially of the ferroelectric spacer.