Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption

A method of fabricating an active matrix backpanel with a metal oxide TFT/pixel array on transparent substrates comprising at least the steps of:

• providing a transparent substrate having a front surface and a rear surface;
• depositing a blanket opaque gate metal layer on the front surface of the substrate and patterning the gate metal layer to form gate/selection lines with patterns defining the gate area of each TFT of the TFT/pixel array;
• depositing a layer of transparent gate dielectric material on the front surface of the substrate overlying the gate metal layer and a surrounding area and a layer of transparent metal-oxide semiconductor material on the surface of the layer of transparent gate dielectric material;
• patterning the layer of transparent metal-oxide semiconductor material into areas corresponding to an entire TFT channel and at least portions of source/drain contact areas;
• depositing a layer of photo-patternable etch stop material on the layer of metal-oxide semiconductor material;
• exposing the layer of photo-patternable etch stop material from the rear surface of the substrate using the opaque gate metal on the front surface of the substrate as a built-in mask and removing exposed portions to form the etch stop layer into a portion overlying and aligned with the gate metal pattern, the overlying and aligned portion of the etch stop layer defining a channel area in the layer of metal oxide semiconductor material with via-holes in the source/drain contact areas;
• depositing and patterning a conductive layer to form data lines of the TFT array crossing-over the gate/selection lines and source and drain contact electrodes on opposed sides of the channel area in the via-holes in the etch-stop layer;
• and
• depositing and patterning a conductive layer to form pixel electrodes within each pixel TFT/pixel array of the active matrix backpanel.

A method of fabricating a metal oxide TFT on a transparent substrate using three masks and comprising the steps of:

• providing a transparent substrate having a front surface and a rear surface;
• patterning opaque gate metal with a first mask on the front surface of the substrate defining a gate area for a TFT;
• depositing a layer of transparent gate dielectric material on the front surface of the substrate overlying the gate area and a surrounding area by vacuum deposition, thermal deposition, sputter, PECVD, MOCVD, ALD, or by coating or printing from a solution;
• depositing a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric;
• depositing a layer of etch stop material on the layer of metal oxide semiconductor material;
• patterning with a second mask, positive photoresist material on the layer of etch stop material to define an isolation area in the layer of transparent metal oxide semiconductor material, the etch stop material and the photoresist material being selectively removable;
• removing uncovered portions of the layer of etch stop material, remaining portions of the layer of etch stop material forming a metal oxide semiconductor material etch mask;
• exposing the photoresist material from the rear surface of the substrate using the opaque gate metal on the front surface of the substrate as a mask and removing exposed portions of the photoresist material so as to leave the layer of etch stop material uncovered except for a portion overlying and aligned with the gate metal;
• using the metal oxide semiconductor material etch mask, etching uncovered portions of the metal oxide semiconductor material so as to isolate the TFT;
• using the portion of the photoresist material directly overlying and aligned with the gate metal, selectively etching uncovered portions of the etch stop layer leaving a portion of the etch stop layer overlying and aligned with the gate metal, the portion of the etch stop layer defining a channel area in the layer of metal oxide semiconductor material;
• and
• depositing and patterning with a third mask conductive material on the portion of the etch stop layer overlying and aligned with the gate metal and on the layer of metal oxide semiconductor material to form source and drain areas on opposed sides of the channel area.

A method of fabricating a metal oxide TFT on a transparent substrate using three masks and comprising the steps of:

• providing a transparent substrate having a front surface and a rear surface;
• patterning opaque gate metal with a first mask on the front surface of the substrate defining a gate area for a TFT;
• depositing a layer of transparent gate dielectric material on the front surface of the substrate overlying the gate area and a surrounding area, a self-aligned surface reaction process forming the layer of transparent gate dielectric material over top and side walls of the gate area;
• depositing a layer of transparent metal oxide semiconductor material on the surface of the layer of transparent gate dielectric;
• depositing a layer of etch stop material on the layer of metal oxide semiconductor material;
• patterning with a second mask, positive photoresist material on the layer of etch stop material to define an isolation area in the layer of transparent metal oxide semiconductor material, the etch stop material and the photoresist material being selectively removable;
• removing uncovered portions of the layer of etch stop material, remaining portions of the layer of etch stop material forming a metal oxide semiconductor material etch mask;
• exposing the photoresist material from the rear surface of the substrate using the opaque gate metal on the front surface of the substrate as a mask and removing exposed portions of the photoresist material so as to leave the layer of etch stop material uncovered except for a portion overlying and aligned with the gate metal;
• using the metal oxide semiconductor material etch mask, etching uncovered portions of the metal oxide semiconductor material so as to isolate the TFT;
• using the portion of the photoresist material directly overlying and aligned with the gate metal, selectively etching uncovered portions of the etch stop layer leaving a portion of the etch stop layer overlying and aligned with the gate metal, the portion of the etch stop layer defining a channel area in the layer of metal oxide semiconductor material;
• and
• depositing and patterning with a third mask conductive material on the portion of the etch stop layer overlying and aligned with the gate metal and on the layer of metal oxide semiconductor material to form source and drain areas on opposed sides of the channel area.