FinFET device and method of fabricating same

A semiconductor device comprising:

• a substrate;
• a fin structure disposed on the substrate, the fin structure including:
• a portion of the substrate containing a first semiconductor material;
• a second semiconductor material disposed on the first semiconductor material and that includes silicon germanium (SiGex), where x is Ge composition in atomic percent;
• a dielectric disposed on a side surface of the second semiconductor material and that includes silicon germanium oxide (SiGeOy), where y is oxygen composition in atomic percent;
• and
• a third semiconductor material disposed on the second semiconductor material and that includes Si;
• and
• a high-k/metal gate (HK/MG) in the gate region, wrapping over a portion of the first fin structure, wherein the HK/MG includes:
• an interfacial layer physically contacting the dielectric and a top surface and two side surfaces of the third semiconductor material;
• and
• a high-K dielectric physically contacting a top surface and two side surfaces of the interfacial layer.

An integrated circuit comprising:

• a substrate including a first semiconductor material and having a portion of the first semiconductor material that extends outward;
• a second semiconductor material disposed on the portion of the first semiconductor material;
• a dielectric disposed on opposing side surfaces of the second semiconductor material;
• a third semiconductor material disposed on the second semiconductor material;
• and
• a gate structure disposed on and overwrapping the second semiconductor material, the dielectric, and the third semiconductor material, wherein the gate structure includes:
• an interfacial layer that physically contacts two side surfaces and a top surface of the third semiconductor material;
• and
• a high-k dielectric that physically contacts two side surfaces and a top surface of the interfacial layer.