MOS field effect transistor
AssigneeHitachi, Ltd.
InventorsToshiyuki Mine, Yasuhiro Shimamoto, Hirotaka Hamamura
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Abstract
The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages.
Claims11
A MOS field effect transistor formed on a SiC substrate, comprising:
- a SiC semiconductor layer which is a step on a surface that is in contact with a gate insulation film,
- wherein the gate insulation film is a layered film which includes an electric charge accumulation film,
- wherein a channel is configured between a source electrode and a drain electrode, and
- wherein 2 or more threshold voltages exist in a channel length direction of the channel, and the channel length in an area where the threshold voltage is the largest is the shortest.
Dependencies are inferred from the claim text.