Loading patent…
AssigneeGlobalfoundries Inc.
InventorsRuilong Xie, William J. Taylor, Jr., Ajey Poovannummoottil Jacob
Estimating the term…
One illustrative method disclosed herein includes, among other things, forming a first epi semiconductor material in a source/drain region of a transistor device, the first epi semiconductor material having a first lateral width at an upper surface thereof, forming a second epi semiconductor material on the first epi semiconductor material and above at least a portion of one of a gate cap layer or one of the sidewall spacers of the device, wherein the second epi semiconductor material has a second lateral width at an upper surface thereof that is greater than the first lateral width, and forming a metal silicide region on the upper surface of the second epi semiconductor material.
A method of forming a transistor device comprising a gate structure, a gate cap layer positioned above said gate structure and a sidewall spacer positioned on opposite sidewalls of said gate structure, the method comprising:
A method of forming a transistor, comprising:
A method of forming a nanowire device, comprising
A method of forming a transistor device comprising a gate structure, a gate cap layer positioned above said gate structure and a sidewall spacer positioned adjacent said gate structure on opposite sides thereof, the method comprising:
A method of forming a nanowire device, comprising
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device:…
Manufacture or treatment: of FETs having zero-dimensional [0D] or one-dimensional [1D] channels, e.g. quantum wire FETs, single-electron…
Manufacture or treatment: of FETs having stacked nanowire, nanosheet or nanoribbon channels
Of fin field-effect transistors [FinFET]: using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide…
About 7 years 7 months of term left · ends 21 May 2034 (estimated)
1. Field of the Disclosure
The present disclosure generally relates to the formation of semiconductor devices and, more specifically, to various methods of forming conductive contact structures for a semiconductor device with a larger metal silicide contact area and the resulting devices.
2. Description of the Related Art
The disclosure may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which:
FIG. 1 depicts a cross-sectional view of an illustrative prior art 3D device;
FIGS. 2A-2X depict various novel methods disclosed herein of forming conductive contact structures for a semiconductor device with a larger metal silicide contact area; and
While the subject matter disclosed herein is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the disclosure to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the disclosure as defined by the appended claims.
Certain terms are used throughout the disclosure to refer to particular components. However, different entities may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. The terms “including” and “comprising” are used herein in open-ended fashion, and thus mean “including, but not limited to.”
The present subject matter will now be described with reference to the attached figures. Various structures, systems, and devices are schematically depicted in the drawings for purposes of explanation only. The attached drawings are included to describe and explain illustrative examples of the present disclosure. The words and phrases used herein should be understood and interpreted to have a meaning consistent with the understanding of those words and phrases by those in the industry. No special definition of a term or phrase, i.e., a definition that is different from the ordinary and customary meaning as understood by those in the industry, is intended to be implied by consistent usage of the term or phrase herein. To the extent that a term or phrase is intended to have a special meaning, such a special definition will be expressly set forth in the specification in a definitional manner that directly and unequivocally provides the special definition for the term or phrase.