Semiconductor devices having high-resistance region and methods of forming the same

A semiconductor device, comprising:

• a well on a substrate;
• a first impurity region on the well , connected to an input/output pad;
• a second impurity region on the well, spaced apart from the first impurity region, and connected to a ground (Vss);
• a third impurity region on the well, spaced apart from the first impurity region, and connected to the ground (Vss);
• and
• an isolation layer between the first impurity region and the second impurity region;
• the well and the third impurity region include first conductive type impurities, the first impurity region and the second impurity region include second conductive type impurities different from the first conductive type impurities, and the well comprises:
• a first region;
• a second region on the first region , having a resistance lower than that of the first region;
• a third region on the second region , having a resistance lower than that of the first region,
• a fourth region on the first region , having a resistance lower than that of the first region;
• and
• a fifth region on the fourth region , having a resistance lower than that of the first region,
• wherein the second region and the third region partially overlap a lower part of the first impurity region, the fourth region and the fifth region overlap the second impurity region, the third impurity region, and the isolation layer, and the first region between the third region and the fifth region directly contacts the isolation layer and the first impurity region.