Variable temperature solders for multi-chip module packaging and repackaging
AssigneeAdvanced Micro Devices, Inc.
InventorDavid H. Eppes
Life of this patent
Estimating the term…
Abstract
Various methods of mounting semiconductor chips on a substrate are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a first plurality of solder interconnect structures to a first semiconductor chip. The first solder interconnect structures have a first melting point. The first semiconductor chip may be tested. If the first semiconductor chip passes the testing, then a second semiconductor chip is coupled to the first semiconductor chip using a second plurality of solder interconnect structures that have a second melting point lower than the first melting point.
Claims13
A method of manufacturing, comprising:
- coupling a first plurality of solder interconnect structures to a first semiconductor chip, the first plurality of solder interconnect structures having a first melting point;
- coupling a second semiconductor chip to the first semiconductor chip using a second plurality of solder interconnect structures having a second melting point lower than the first melting point;
- and
- removing the second semiconductor chip from the first semiconductor chip by heating the second plurality of solder interconnect structures to or above the second melting point but below the first melting point.
A method of manufacturing, comprising:
- coupling a first semiconductor chip to a substrate using a first plurality of solder interconnect structures, the first plurality of solder interconnect structures having a first melting point;
- coupling a second semiconductor chip to the first semiconductor chip using a second plurality of solder interconnect structures, the second plurality of solder interconnect structures having a second melting point lower than the first melting point;
- testing the second semiconductor chip;
- and
- if the second semiconductor chip fails the testing, then removing the second semiconductor chip from the first semiconductor chip by heating the second plurality of solder interconnect structures to or above the second melting point but below the first melting point.
A method of manufacturing, comprising:
- coupling a first semiconductor chip to a substrate using a first plurality of solder interconnect structures, the first plurality of solder interconnect structures having a first melting point;
- coupling a second semiconductor chip to the substrate using a second plurality of solder interconnect structures, the second plurality of solder interconnect structures having a second melting point lower than the first melting point;
- removing the second semiconductor chip from the substrate by heating the second plurality of solder interconnect structures to or above the second melting point but below the first melting point;
- and
- testing the second semiconductor chip.
Dependencies are inferred from the claim text.