US 9,318,439 B2 · Interconnect structure and manufacturing method thereof

Abstract

The present disclosure provides an interconnect structure, including a substrate, a first conductive feature over the substrate, a second conductive feature over the first conductive feature, and a dielectric layer surrounding the first conductive feature and the second conductive feature. A width of the first conductive feature and a width of the second conductive feature are between 10 nm and 50 nm. The present disclosure also provides a method for manufacturing an interconnect structure, including (1) forming a via opening and a line trench in a dielectric layer, (2) forming a 1-dimensional conductive feature in the via opening, (3) forming a conformal catalyst layer over a sidewall of the line trench, a bottom of the line trench, and a top of the 1-dimensional conductive feature, and (4) removing the conformal catalyst layer from the bottom of the line trench and the top of the 1-dimensional conductive feature.

Claims20

Dependent claims

An interconnect structure, comprising:

a substrate;
a first conductive feature, comprising materials of 1-dimensional conduction feature, and forming a continuous region over the substrate;
a second conductive feature over the first conductive feature, comprising materials of 2-dimensional conduction feature;
and
a third conductive feature under the 1-dimensional conduction feature;
a dielectric layer surrounding the first conductive feature and the second conductive feature,
wherein a width of the first conductive feature and a width of the second conductive feature are in a range of from about 10 nm to about 50 nm.

4 more elements

Dependencies are inferred from the claim text.

Interconnect structure and manufacturing method thereof

Life of this patent

Interconnect structure and manufacturing method thereof

Life of this patent

Abstract

Claims20