Stack of horizontally extending and vertically overlapping features, methods of forming circuitry components, and methods of forming an array of memory cells

A method of forming circuitry components, comprising:

• forming a stack of horizontally extending and vertically overlapping features, the stack comprising a primary portion and an end portion, at least some of the features extending farther in the horizontal direction in the end portion moving deeper into the stack in the end portion;
• forming first structures vertically through the features in the primary portion and forming second structures vertically through the features in the end portion;
• removing at least some sacrificial material that is elevationally between material of the features in the primary and end portions to form void spaces elevationally between the horizontally extending and vertically overlapping features;
• and
• forming conductor material within the void space and forming a stack of horizontally extending and vertically overlapping conductive lines from the conductor material.

A method of forming an array of cross-point memory cells, comprising:

• forming a stack of horizontally extending and vertically overlapping dielectric features, the stack comprising a primary portion and an end portion, at least some of the dielectric features extending farther in the horizontal direction in the end portion moving deeper into the stack in the end portion;
• forming openings through the dielectric features in the primary portion and in the end portion;
• lining the openings with first material;
• forming programmable material and conductive material within the first material-lined openings;
• forming horizontally elongated trenches through the dielectric features to form horizontally elongated and vertically overlapping dielectric lines from dielectric material of the dielectric features, the dielectric lines individually extending from the primary portion into the end portion and individually laterally about sides of both the openings in the primary and end portions;
• removing at least some of sacrificial material that is elevationally between the dielectric lines in the primary and end portions laterally between the trenches selectively relative to the dielectric lines and the first material lining in the openings;
• after removing at least a portion of the sacrificial material, removing at least a portion of the first material that is elevationally between the dielectric lines to expose laterally outer sidewalls of the programmable material that is elevationally between the dielectric lines;
• and
• replacing at least a portion of the sacrificial material with conductor material that is in electrical connection with the laterally outers sidewalls of the programmable material and to comprise vertically spaced horizontal conductive lines;
• individual ones of the cross-point memory cells comprising crossing ones of the horizontal conductive lines in the primary portion and conductive material in the openings in the primary portion having the programmable material there-between.