Back to results
US 9,318,405 B2Granted
Wafer level package without sidewall cracking
AssigneeQUALCOMM Incorporated
InventorsJianwen Xu, Lizabeth Ann Keser, William Stone, Steve Joseph Bezuk, Nicholas Ka Ming Yu
Life of this patent
Estimating the term…
Abstract
A wafer level package device may include a molding compound that encapsulates a substrate, a back end of line and front end of line layer on the substrate and a passivation layer of a redistribution layer without encapsulating a metal layer on the passivation layer. The molding compound may eliminate sidewall chipping and cracking as well as reduce the need for back side lamination.
Claims20
A wafer level package device comprising:
- a substrate including a non-active substrate side that extends between a first substrate sidewall and a second substrate sidewall and an active substrate side that extends between a third substrate sidewall and a fourth substrate sidewall, the first substrate sidewall opposite the second substrate sidewall and the third substrate sidewall opposite the fourth substrate sidewall;
- an integrated circuit layer proximate the active substrate side;
- a redistribution layer coupled to the integrated circuit layer, the redistribution layer including a metal layer and a dielectric layer;
- and
- a molding compound including a first molding compound sidewall and a second molding compound sidewall opposite the first molding compound sidewall, the molding compound encapsulates the substrate and the integrated circuit layer such that a first width between the first molding compound sidewall and the first substrate sidewall is greater than a second width between the first molding compound sidewall and the third substrate sidewall, and the metal layer being free of the molding compound.
2 more elements
A wafer level package device comprising:
- a substrate including a non-active substrate side that extends between a first substrate sidewall and a second substrate sidewall and an active substrate side that extends between a third substrate sidewall and a fourth substrate sidewall, the first substrate sidewall opposite the second substrate sidewall and the third substrate sidewall opposite the fourth substrate sidewall;
- an integrated circuit layer proximate the active substrate side;
- a redistribution layer coupled to the integrated circuit layer, the redistribution layer including a metal layer and a dielectric layer;
- and
- a molding compound including a first molding compound sidewall and a second molding compound sidewall opposite the first molding compound sidewall, the molding compound encapsulates the substrate and the integrated circuit layer while leaving the metal layer exposed such that a first width between the first molding compound sidewall and the first substrate sidewall is greater than a second width between the first molding compound sidewall and the third substrate sidewall.
2 more elements
A wafer level package device comprising:
- a substrate including a non-active substrate side that extends between a first substrate sidewall and a second substrate sidewall and an active substrate side that extends between a third substrate sidewall and a fourth substrate sidewall, the first substrate sidewall opposite the second substrate sidewall and the third substrate sidewall opposite the fourth substrate sidewall;
- an integrated circuit layer proximate the active substrate side;
- a redistribution layer coupled to the integrated circuit layer, the redistribution layer including a dielectric layer in contact with the integrated circuit layer, a polymer layer on the dielectric layer, and a metal layer in the polymer layer;
- a molding compound including a first molding compound sidewall even with the third substrate sidewall, a second molding compound sidewall even with the fourth substrate sidewall, a third molding compound sidewall that extends horizontally beyond the first molding compound sidewall, and a fourth molding compound sidewall that extends horizontally beyond the second molding compound sidewall;
- and
- the molding compound encapsulates the substrate such that a sixth width between the third molding compound sidewall and the first substrate sidewall is greater than a first width between the first molding compound sidewall and the first substrate sidewall.
3 more elements
Dependencies are inferred from the claim text.