Method of fabricating flash memory

A method of fabricating a flash memory, comprising:

• providing at least a fin structure and an insulating layer disposed at two sides of the fin structure, wherein the fin structure comprises a floating gate material, an oxide layer and a semiconductive layer arranged in a top-down sequence, and part of the floating gate material protrudes from the insulating layer and a height of the insulating layer is greater than a height of the oxide layer;
• forming a dielectric layer conformally covering the floating gate material and the insulating layer;
• forming a patterned first mask layer, a patterned second mask layer, and a control gate stacked in a top-down sequence on part of the dielectric layer, and exposing the other part of the dielectric layer, wherein an extending direction of the patterned first mask layer, an extending direction of the patterned second mask layer and an extending direction of the control gate are perpendicular to an extending direction of the fin structure;
• performing at least one first isotropic etching step to remove the exposed dielectric layer until the exposed dielectric layer is removed entirely to expose the floating gate material underneath the exposed dielectric layer;
• and
• performing a floating gate material patterning step, wherein the floating gate material patterning step comprises removing the exposed floating gate material to form at least one floating gate.