Shallow trench isolation structure

Abstract

A semiconductor device includes a semiconductor substrate, an active region and a trench isolation. The active region is formed in the semiconductor substrate. The trench isolation is disposed adjacent to the active region. The trench isolation includes a lower portion and an upper portion. The upper portion is located on the lower portion. The upper portion has a width gradually decreased from a junction between the upper portion and the lower portion toward a top of the trench isolation. In a method for fabricating the semiconductor device, at first, the semiconductor substrate is etched to form a trench in the semiconductor substrate. Then, an insulator fills the trench to form the trench isolation. Thereafter, the gate structure is formed on the semiconductor substrate. Then, the semiconductor substrate is etched to form a recess adjacent to the trench isolation. Thereafter, at least one doped epitaxial layer grows in the recess.

Dependencies are inferred from the claim text.