Wafer backside particle mitigation

A method of particle mitigation comprising:

• obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes;
• coating the backside with a mitigating layer comprising silicon or amorphous carbon;
• planarizing the coated backside by a planarizing process;
• placing the semiconductor wafer onto a wafer chuck such that the wafer chuck makes direct contact with the coated backside;
• while maintaining the coated backside in direct contact with the wafer chuck, performing a first lithographic process on the frontside;
• and
• further comprising, between planarizing the coated backside and placing the semiconductor wafer onto the wafer chuck, coating the coated backside with a stop layer that is compositionally different than the mitigating layer, coating the stop layer with another mitigating layer comprising silicon or amorphous carbon and planarizing the another mitigating layer by a second planarizing process.

A method of particle mitigation comprising:

• obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes;
• coating the backside with a mitigating layer comprising silicon or amorphous carbon;
• planarizing the coated backside by a planarizing process;
• placing the semiconductor wafer onto a wafer chuck such that the wafer chuck makes direct contact with the coated backside;
• while maintaining the coated backside in direct contact with the wafer chuck, performing a first lithographic process on the frontside;
• further comprising coating the frontside with a protective layer;
• and
• further comprising removing the frontside coating prior to performing the first lithographic process.

A method of particle mitigation comprising:

• obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes;
• coating the backside with a mitigating layer comprising silicon or amorphous carbon material;
• planarizing the coated backside by a planarizing process;
• placing the semiconductor wafer onto an electrostatic wafer chuck such that the electrostatic wafer chuck makes direct contact with the coated backside;
• and
• while maintaining the coated backside in direct contact with the electrostatic wafer chuck, performing an extreme ultraviolet (EUV) lithographic process on the frontside;
• wherein the mitigating layer encapsulates particulate matter and fills in scratches on the backside.

A method of particle mitigation comprising:

• obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes;
• coating the backside with a mitigating layer comprising silicon or amorphous carbon material;
• planarizing the coated backside by a planarizing process;
• placing the semiconductor wafer onto an electrostatic wafer chuck such that the electrostatic wafer chuck makes direct contact with the coated backside;
• while maintaining the coated backside in direct contact with the electrostatic wafer chuck, performing an extreme ultraviolet (EUV) lithographic process on the frontside;
• further comprising coating the frontside with a protective layer;
• and
• further comprising removing the frontside coating prior to performing the lithographic process.

A method of particle mitigation comprising:

• obtaining a semiconductor wafer having a nonfunctional backside and a functional frontside on which semiconductor devices are formed by one or more lithography processes;
• coating the backside with a mitigating layer comprising silicon or amorphous carbon material;
• planarizing the coated backside by a planarizing process;
• coating the mitigating layer with a stop layer that is compositionally different than the mitigating layer;
• coating the stop layer with another mitigating layer comprising silicon or amorphous carbon material;
• planarizing the coated backside by the planarizing process;
• repeating, a predetermined number of times, coating the another mitigating layer with the stop layer, coating the stop layer with a next another mitigating layer comprising silicon or amorphous carbon, and planarizing the coated backside by the planarizing process;
• placing the semiconductor wafer onto a wafer chuck such that the wafer chuck makes direct contact with the coated backside;
• and
• while maintaining the coated backside in direct contact with the wafer chuck, performing a lithographic process on the frontside.