US 9,318,342 B2Granted

Methods of removing fins for finfet semiconductor devices

AssigneeGlobalfoundries Inc.

InventorsRuilong Xie, Andreas Knorr, Ajey Poovannummoottil Jacob, Michael Hargrove

Life of this patent

Estimating the term…

Loading patent…

Abstract

One illustrative method disclosed herein includes forming a plurality of initial fins in a substrate, wherein at least one of the initial fins is a to-be-removed fin, forming a material adjacent the initial fins, forming a fin removal masking layer above the plurality of initial fins, removing a desired portion of the at least one to-be-removed fin by: (a) performing a recess etching process on the material to remove a portion, but not all, of the material positioned adjacent the sidewalls of the at least one to-be-removed fin, (b) after performing the recess etching process, performing a fin recess etching process to remove a portion, but not all, of the at least one to be removed fin and (c) repeating steps (a) and (b) until the desired amount of the at least one to-be-removed fin is removed.

Claims12

Dependent claims

A method, comprising:

forming a trench patterning hard mask layer above a surface of a semiconductor substrate;
performing at least one first etching process through said trench patterning hard mask layer to define a plurality of trenches in said semiconductor substrate to thereby define a plurality of initial fins in said substrate, wherein at least one of said initial fins is a to-be-removed fin;
forming a layer of insulating material within said trenches;
forming a patterned fin removal masking layer above said plurality of initial fins and said layer of insulating material, said patterned fin removal masking layer having an opening positioned above said at least one to-be-removed fin, wherein a portion of said trench patterning hard mask layer is positioned above said at least one to-be-removed fin and below said opening in said patterned fin removal masking layer;
performing at least one second etching process through said opening in said patterned fin removal masking layer to remove at least the underlying portion of said trench patterning hard mask layer;
after performing said at least one second etching process, performing a third etching process through said opening in said patterned fin removal masking layer to define a fin opening in said layer of insulating material that exposes substantially all of a vertical height of said at least one to-be-removed fin;
performing a fourth etching process through said opening in said patterned fin removal masking layer and said fin opening in said layer of insulating material until the desired amount of said at least one to-be-removed fin is removed;
and
forming an insulating material in an area that includes an area formerly occupied by said at least one to-be-removed fin.

6 more elements

A method, comprising:

forming a plurality of trenches in a semiconductor substrate to thereby define a plurality of initial fins in said substrate, said initial fins having sidewalls, wherein at least one of said initial fins is a to-be-removed fin;
performing a blanket deposition process to form a layer of insulating material adjacent said sidewalls of said initial fins and within said trenches and above a bottom of said trenches;
forming a fin removal masking layer above said plurality of initial fins, said fin removal masking layer having an opening positioned above said at least one to-be-removed fin and at least a portion of said layer of insulating material that was formed adjacent said at least one to-be-removed fin;
removing a desired portion of said at least one to-be-removed fin by:
(a) performing a recess etching process on said layer of insulating material that was formed adjacent said at least one to-be-removed fin to remove a portion, but not all, of said layer of insulating material that was formed adjacent said at least one to-be-removed fin;
(b) after performing said recess etching process, performing a fin recess etching process to remove a portion, but not all, of said at least one to-be-removed fin;
and
(c) repeating steps (a) and (b) until the desired amount of said at least one to-be-removed fin is removed;
and
forming an insulating material in an area that includes an area formerly occupied by said at least one to-be-removed fin.

7 more elements

A method, comprising:

forming a plurality of trenches in a semiconductor substrate to thereby define a plurality of initial fins in said substrate, said initial fins having sidewalls, wherein at least one of said initial fins is a to-be-removed fin;
performing a blanket deposition process to form a layer of insulating material adjacent said sidewalls of said initial fins and within said trenches and above a bottom of said trenches;
forming a fin removal masking layer above said plurality of initial fins, said fin removal masking layer having an opening positioned above said at least one to-be-removed fin and at least a portion of said layer of insulating material that was formed adjacent said at least one to-be-removed fin;
removing a desired portion of said at least one to-be-removed fin by:
(a) performing a recess etching process on said layer of insulating material that was formed adjacent said at least one to-be-removed fin to remove a portion, but not all, of said layer of insulating material that was formed adjacent said at least one to-be-removed fin, wherein, after performing step (a), an upper surface of said recessed layer of insulating material that was formed adjacent said at least one to-be-removed fin is positioned at a level that is below a level of an upper surface of said at least one to-be-removed fin;
(b) after performing said recess etching process, performing a fin recess etching process to remove a portion, but not all, of said at least one to-be-removed fin;
and
(c) repeating steps (a) and (b) until the desired amount of said at least one to-be-removed fin is removed, wherein each of said etching processes set forth in step (b) consumes between 10-30 nm of a vertical height of said at least one to-be-removed fin;
and
forming an insulating material in an area that includes an area formerly occupied by said at least one to-be-removed fin.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 14/811,987Filed 29 Jul 2015 · division
Priority: 3 Mar 2014
Published: US 2015/0249127 A126 Nov 2015
Granted: 19 Apr 2016
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10P 50/694
Characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane: characterised by their behaviour…
H10D 30/62
Insulated-gate field-effect transistors [IGFET]: fin field-effect transistors [FinFET]
H10D 62/115
Isolations within a component, i.e. internal isolations: dielectric isolations, e.g. air gaps
H10D 62/126
Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions: top-view geometrical layouts of…

Family

Application14/195,344Parent of this division · filed 3 Mar 2014
US 2015/0340238 A1Pre-grant publication · published 26 Nov 2015
US 9,147,730 B2Parent of this division
US 2015/0249127 A1Published application
US 9,318,342 B2This patent

From the US filing history. Foreign family members aren’t listed.