Multilevel cell nonvolatile memory system
AssigneeSamsung Electronics Co., Ltd.
InventorsJin-Hee Ma, Da-Woon Jung, Byung-Hei Jun
Life of this patent
Estimating the term…
Abstract
A multilevel cell (MLC) nonvolatile memory system including a plurality of memory cells each cell storing first bit data and second bit data, and a controller programming the plurality of memory cells on a page-by-page basis, the controller programming original data to an original block and programming copy data that is the same as the original data to a mirroring block, wherein first bit page data and second bit page data of the original data are programmed to memory cells connected to the same word line, but the first bit page data and second bit page data of the copy data are programmed to memory cells connected to different word lines.
Claims16
A multilevel cell (MLC) nonvolatile memory system comprising:
- a plurality of memory cells;
- and
- a controller configured to program first bit data and second bit data into each of the plurality of memory cells on page-by-page basis, the controller programming original first bit data and original second bit data to first and second pages of an original block and programming copy first bit data and copy second bit data that is the same as the original data to at least one mirroring block,
- wherein first bit data and second bit data of the original data are programmed to memory cells connected to the same word line, and first bit data and second bit data of the copy data are programmed to memory cells connected to different word lines.
A multilevel cell (MLC) nonvolatile memory system comprising:
- a plurality of memory cells;
- and
- a controller configured to program two bit information into each of the plurality of memory cells on a page-by-page basis, the controller programming original data to a first block and programming copy data that is the same as the original data to a second block,
- wherein the controller programs sequentially the original data from a first page address of the first block and programs sequentially the copy data from a second page address of the second block, wherein the first page address and the second page address are different from each other so that a first bit data of the original data and a corresponding first bit data of the copy data are programmed in different page addresses of the first page address and the second page address, respectively.
A multilevel cell (MLC) nonvolatile memory system comprising:
- an original block including a plurality of word lines, each word line having a plurality of multilevel cells;
- at least one mirroring block including a plurality of word lines, each word line having a plurality of multilevel cells;
- and
- a controller configured to program first bit data and second bit data into each of the plurality of memory cells on a page-by-page basis, the controller programming original first bit data and original second bit data to first and second pages at the first wordline of the original block and programming copy first bit data and copy second bit data that is the same as the original data to the at least one mirroring block, wherein first bit data and second bit data of the original data are programmed to memory cells of the same word line of the original block, and first bit data and second bit data of the copy data are programmed to memory cells of different word lines of the at least one mirroring block.
Dependencies are inferred from the claim text.