Nonvolatile semiconductor memory device with a three-dimensional structure in which sub-blocks are independently erasable
AssigneeKabushiki Kaisha Toshiba
InventorsKoji Hosono, Naoya Tokiwa
Life of this patent
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Abstract
A memory cell array includes a plurality of memory strings divided into a plurality of sub-blocks, each memory string including a plurality of memory cells which are connected to word lines and each sub-block being erasable independently with respect to the other sub-blocks. During writing, a control unit changes a verification level to be applied to a selected word line included in a selected sub-block depending on whether or not data has been written in a non-selected sub-block.
Claims11
A nonvolatile semiconductor memory device comprising:
- a memory cell array which includes a plurality of memory strings divided into a plurality of sub-blocks, each memory string including a plurality of memory cells connected to word lines and each sub-block being erasable independently with respect to the other sub-blocks;
- a control unit configured to change a verification voltage to be applied to a selected word line included in a selected sub-block when data is written, depending on whether or not data is written in a non-selected sub-block;
- and
- flag cells which are respectively provided in the plurality of sub-blocks and store flag data indicating whether or not data is written in the sub-blocks,
- wherein when the flag data which is stored in the flag cell in the non-selected sub-block indicates writing, the control unit sets the verification voltage to be higher than when the flag data does not indicate writing in the non-selected sub-block.
A method of writing data in a nonvolatile semiconductor memory device comprising a memory cell array which includes a plurality of memory strings divided into a plurality of sub-blocks, each memory string including a plurality of memory cells connected to word lines and each sub-block being erasable independently with respect to the other sub-blocks and including flag data indicating whether or not data is written therein, said method comprising:
- selecting a sub-block for writing;
- determining whether or not data is written in a non-selected sub-block by reading the flag data corresponding to the non-selected sub-block;
- and
- changing a verification voltage to be applied to a selected word line included in the selected sub-block based on said determining,
- wherein when the flag data corresponding to the non-selected sub-block indicates writing, setting the verification voltage to be higher than when the flag data does not indicate writing in the non-selected sub-block.
Dependencies are inferred from the claim text.