Nonvolatile memory device changing a period of an internal clock

A nonvolatile memory device comprising:

• a core unit configured to be capable of storing data and
• a peripheral circuit unit configured to program and read the data to and from the core unit,
• the peripheral circuit unit being configured to generate an internal clock having a first period and change the first period to be a second period after being input a first command and a second command within an interval,
• wherein the peripheral circuit unit, in startup, is configured to:
• generate the internal clock having the first period;
• correct the first period to be the second period by being input the internal clock having the first period;
• read period correction information from the core unit by using the internal clock having the second period;
• and
• correct the period of the internal clock to be a third period by using the period correction information, and
• the peripheral circuit unit is configured to program and read data input from the outside by using the internal clock having the third period.