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US 9,318,207 B2Granted
Nonvolatile semiconductor memory device and method of operating the same
AssigneeKabushiki Kaisha Toshiba
InventorsKota Nishikawa, Masanori Hatakeyama, Takanori Eto, Atsuhiro Suzuki
Life of this patent
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Abstract
A nonvolatile semiconductor memory device according to an embodiment comprises a control unit, during a data erase, applying at least to a word line connected to a memory cell disposed most to a source line side a lower control voltage than that applied to a word line connected to a memory cell disposed most to a bit line side, of a plurality of word lines connected to at least a plurality of memory cells mutually written with data of an identical number of bits in a cell string.
Claims11
A nonvolatile semiconductor memory device, comprising:
- a cell array including a bit line, a plurality of word lines and a source line that intersect the bit line, and a cell string electrically connected between the bit line and the source line, the cell string including a plurality of memory cells connected to each other in series, each of the memory cells being configured from a transistor having a structure in which a charge accumulation layer and a control gate which is connected to one of the word lines are stacked on a semiconductor substrate via an insulating film;
- and
- a control unit that performs a data write/erase on the memory cell,
- the control unit, during the data erase, applying at least to the word line connected to the memory cell disposed most to a source line side a lower control voltage than that applied to the word line connected to the memory cell disposed most to a bit line side, of a plurality of the word lines connected to at least a plurality of the memory cells mutually written with data of an identical number of bits in the cell string.
1 more element
Dependencies are inferred from the claim text.