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US 9,318,189 B2Granted
Sense amplifier circuit
AssigneeKabushiki Kaisha Toshiba
InventorTakaaki Nakazato
Life of this patent
Estimating the term…
Abstract
A sense amplifier circuit includes first and second lines and first and second inverters. Each inverter includes an input terminal, an output terminal, and a power source terminal. A second signal line potential is supplied to the first inverter input terminal. The second inverter input terminal is connected to the first inverter input terminal. A first signal line potential is supplied to the second inverter input terminal. A first switch transistor is connected to the first inverter power source terminal and has a gate connected to the second signal line. A switch second transistor is connected to the second inverter power source terminal and has a gate connected to the first signal line.
Claims18
A sense amplifier circuit, comprising:
- a first signal line having a first potential;
- a second signal line having a second potential;
- a first inverter that includes a first input terminal to which the second potential is supplied, a first output terminal, and a first power source terminal;
- a second inverter that includes a second input terminal to which the first potential is supplied, the second input terminal being connected to the first output terminal, a second output terminal connected to the first input terminal, and a second power source terminal;
- a first switch transistor that includes a first gate electrode to which the second potential is supplied and a first current path having a first end connected to the first power source terminal;
- a second switch transistor that includes a second gate electrode to which the first potential is supplied and a second current path having a first end connected to the second power source terminal;
- a first transfer transistor that includes a current path having first end connected to the first signal line and a second end connected to the second input terminal and the first output terminal;
- a second transfer transistor that includes a current path having a first end connected the second signal line and a second end connected to the first input terminal and the second output terminal;
- a first control circuit configured to supply one of the second potential and a reference potential to the first gate electrode and a gate electrode of the first transfer transistor according to a control signal;
- and
- a second control circuit configured to supply one of the first potential or the reference potential to the second gate electrode and a gate electrode of the second transfer transistor according to the control signal.
8 more elements
A sense amplifier circuit, comprising:
- a first signal line;
- a second signal line;
- a first inverter that includes a first input terminal, a first output terminal, and a first power source terminal;
- a second inverter that includes a second input terminal that is connected to the first output terminal, a second output terminal that is connected to the first input terminal, and a second power source terminal;
- a first switch transistor that includes a first current path having a first end connected to the first power source terminal and a second end connected to a reference potential;
- a second switch transistor that includes a second current path having a first end connected to the second power source terminal and a second end connected to the reference potential;
- a first transfer transistor that includes a third current path having a first end connected to the first signal line and a second end connected to the second input terminal and the first output terminal;
- a second transfer transistor that includes a fourth current path having a first end connected the second signal line and a second end connected to the first input terminal and the second output terminal;
- a first control circuit configured to supply one of a potential of the second signal line and the reference potential to a gate electrode of the first switch transistor and a gate electrode of the first transfer transistor according to a control signal;
- and
- a second control circuit configured to supply one of a potential of the first signal line and the reference potential to a gate electrode of the second switch transistor and a gate electrode of the second transfer transistor according to the control signal.
8 more elements
A memory device, comprising:
- a memory cell array;
- a first signal line connected to a plurality of bit lines of the memory cell array by a first multiplexer;
- a second signal line connected to a plurality of complementary bit lines of the memory cell array by a second multiplexer;
- a first inverter that includes a first input terminal, a first output terminal, and a first power source terminal;
- a second inverter that includes a second input terminal that is connected to the first output terminal, a second output terminal that is connected to the first input terminal, and a second power source terminal;
- a first switch transistor that includes a first current path having a first end connected to the first power source terminal and a second end connected to a reference potential;
- a second switch transistor that includes a second current path having a first end connected to the second power source terminal and a second end connected to the reference potential;
- a first transfer transistor that includes a third current path having a first end connected to the first signal line and a second end connected to the second input terminal and the first output terminal;
- a second transfer transistor that includes a fourth current path having a first end connected the second signal line and a second end connected to the first input terminal and the second output terminal;
- a first control circuit configured to supply one of a potential of the second signal line and the reference potential to a gate electrode of the first switch transistor and a gate electrode of the first transfer transistor according to a control signal;
- and
- a second control circuit configured to supply one of a potential of the first signal line and the reference potential to a gate electrode of the second switch transistor and a gate electrode of the second transfer transistor according to the control signal.
9 more elements
Dependencies are inferred from the claim text.