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US 9,318,188 B2Granted
Semiconductor memory with data line capacitive coupling
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJhon-Jhy Liaw
Life of this patent
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Abstract
A semiconductor memory is disclosed that includes a first data line, a second data line, a first coupling line and a second coupling line. The first coupling line is configured to capacitively couple the first coupling line with the first data line. The second coupling line is configured to capacitively couple the second coupling line with the second data line.
Claims22
A semiconductor memory, comprising:
- a first data line and a second data line which are configured to transmit signals in a write operation;
- a first coupling line configured to capacitively couple the first coupling line with the first data line;
- and
- a second coupling line configured to capacitively couple the second coupling line with the second data line.
1 more element
A semiconductor memory, comprising:
- a plurality of memory cells arranged in a first direction and a second direction perpendicular to the first direction;
- a pair of data lines configured to transmit signals to the memory cells in a write operation, and associated with at least one of the memory cells arranged in the first direction;
- and
- a plurality of coupling lines comprising a first coupling line and a second coupling line both associated with the at least one of the memory cells arranged in the first direction;
- wherein the first coupling line and one of the data lines are configured to have capacitance therebetween, and the second coupling line and the other of the data lines are configured to have capacitance therebetween.
2 more elements
Dependencies are inferred from the claim text.