Signal receiver

A DDR signal receiver, comprising:

• a first stage amplifier, comprising:
• a first current source, configured to provide a first current having a current value;
• a first pair of active input devices, each of the first pair of active input devices having a control node, a first conduction node and a second conduction node, one control node of the pair of active input devices receiving an input signal, the first conduction nodes connected and receiving the first current, one of the second conduction nodes serving as an output nodes, the first pair of active input devices outputting an output signal to a core circuit according to the current and the input signal;
• and
• a first pair of resistors, each resistor having a resistance value and connected between one of the second conduction nodes and a power line;
• and
• a second-stage amplifier, comprising:
• a second current source, configured to provide a second current;
• a second pair of active input devices, each of the second pair of active input devices having a control node, a first conduction node and a second conduction node, the first conduction nodes of the second pair of active input devices connected to each other, the control nodes of the second pair of active input devices connected to the first-stage output nodes, respectively;
• and
• a second pair of resistors, each of the second pair of resistors having second resistance value and connected between one of the second conduction nodes of the second pair of active input devices and the power line;
• wherein, a target voltage value is determined according to the resistance value and the current value, such that a voltage swing of the output signal is limited within the target voltage value, and an operating voltage of the core circuit is substantially equal to the target voltage value, one of the second conduction nodes of the second pair of active input devices outputs second output signal, and a product of the second resistance value and the second current value is substantially equal to the operating voltage, the signal receiver is formed in an integrated circuit, the integrated circuit comprises a plurality of core devices and a plurality of high-voltage tolerant devices, the high-voltage tolerant devices have a higher voltage tolerance compared to the core devices, the pair of active input devices are high-voltage tolerant devices, and the second pair of active input devices are core devices.