Semiconductor devices and semiconductor systems including the same
AssigneeSK hynix Inc.
InventorBok Rim Ko
Life of this patent
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Abstract
The semiconductor device includes an internal command generator and an internal address generator. The internal command generator generates first and second command latch signals from first and second internal clock signals in response to an external control signal and latches a command signal in response to the first and second command latch signals to generate a synthesized internal command signal. The internal address generator generates first and second address latch signals from the first and second internal clock signals in response to the external control signal and latches an address signal in response to the first and second address latch signals to generate a synthesized internal address signal.
Claims18
A semiconductor device comprising:
- an internal command generator suitable for generating first and second command latch signals from first and second internal clock signals in response to an external control signal and suitable for latching a command signal in response to the first and second command latch signals to generate a synthesized internal command signal;
- and
- an internal address generator suitable for generating first and second address latch signals from the first and second internal clock signals in response to the external control signal and suitable for latching an address signal in response to the first and second address latch signals to generate a synthesized internal address signal, wherein the external control signal is a chip selection signal for selecting a chip including the semiconductor device.
A semiconductor system comprising:
- a controller suitable for generating a clock signal, an external control signal, a command signal and an address signal;
- and
- a semiconductor device including an internal command generator,
- wherein the internal command generator is suitable for generating first and second command latch signals from first and second internal clock signals generated from the clock signal in response to the external control signal and suitable for latching the command signal in response to the first and second command latch signals to generate a synthesized internal command signal, and
- wherein the external control signal is a chip selection signal for selecting a chip including the semiconductor device.
A semiconductor system comprising:
- a controller suitable for generating a clock signal, an external control signal, a command signal and an address signal;
- and
- a semiconductor device including an internal address generator,
- wherein the internal address generator is suitable for generating first and second address latch signals from first and second internal clock signals generated from the clock signal in response to the external control signal and suitable for latching the address signal in response to the first and second address latch signals to generate a synthesized internal address signal, and
- wherein the external control signal is a chip selection signal for selecting a chip including the semiconductor device.
Dependencies are inferred from the claim text.