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US 9,318,176 B2Granted
Semiconductor integrated circuit
AssigneeSK hynix Inc.
InventorsSang Kyu Lee, Wan Ik Cho
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes a clock pulse generating circuit suitable for outputting a command enable clock pulse when a predetermined command is input during a predetermined command-masking period, a command interface circuit suitable for outputting an internal command signal based on the command enable clock pulse and the command, and a target operating circuit suitable for performing an operation corresponding to the command based on the internal command signal.
Claims20
A semiconductor integrated circuit, comprising:
- a clock pulse generating circuit suitable for outputting a command enable clock pulse when a predetermined command is input during a predetermined command-masking period;
- a command interface circuit suitable for outputting an internal command signal based on the command enable clock pulse and the command;
- and
- a target operating circuit suitable for performing an operation corresponding to the command based on the internal command signal.
1 more element
A semiconductor integrated circuit, comprising:
- a clock pulse generating circuit suitable for generating a command enable clock pulse suitable for being activated after a predetermined command-masking period when data is input or output;
- a command interface circuit suitable for receiving a command based on the command enable clock pulse to output an internal command signal;
- and
- a target operation circuit suitable for performing an operation corresponding to the internal command signal,
- wherein the clock pulse generating circuit is suitable for forcibly adjusting the command enable clock pulse to be activated in the predetermined command-masking period when an application of a reset command is detected.
2 more elements
A semiconductor integrated circuit, comprising:
- a delaying unit suitable for delaying a flag signal based on a clock signal, wherein the flag signal denotes that a data input or output operation is performed;
- a command detecting unit suitable for detecting an application of a reset command during a predetermined command-masking period, and adjusting a transition time point of the delayed flag signal based on the detected result to output a pulse enable signal;
- a pulse generating unit suitable for generating a command enable clock pulse based on the pulse enable signal;
- a command interface circuit suitable for receiving a command based on the command enable clock pulse to output an internal command signal;
- and
- a target operation circuit suitable for performing an operation corresponding to the internal command signal.
3 more elements
Dependencies are inferred from the claim text.