Robust memory start-up using clock counter
AssigneeFreescale Semiconductor, Inc.
InventorsRichard K. Eguchi, Craig D. Gunderson
Life of this patent
Estimating the term…
Abstract
In accordance with at least one embodiment, a clock counter on a system (for example, a system-on-a-chip (SOC) or other system) is utilized to count a number of a clock edges of a memory clock within a predefined time based on a predetermined system clock frequency and, therefore, to determine whether the memory clock for a memory array (for example, a non-volatile memory (NVM) array or other memory array) is correct or not. The system is directed to wait until the count is within an expected range before moving to the next step in a start-up procedure. If the maximum allowed start-up time is exceeded, an error signal is sent to the system such that the application can react to it.
Claims20
A method comprising:
- starting a memory clock for a memory array, wherein the memory clock provides a clock signal to control access to data stored in the memory array;
- counting a count of memory clock edges of the clock signal of the memory clock using a second clock;
- and
- allowing access to the memory array in response to the count of the memory clock edges being within a predefined range.
A method comprising:
- starting a non-volatile memory (NVM) clock, wherein proper operation of an NVM is conditioned upon a proper NVM clock frequency of a clock signal of the NVM clock, wherein the clock signal is to control access to data stored in the NVM;
- verifying the proper NVM clock frequency using a second clock;
- and
- proceeding with configuration of the NVM after the proper NVM clock frequency has been verified.
Apparatus comprising:
- a non-volatile memory (NVM) cell array;
- a NVM clock, the NVM clock coupled to the NVM cell array, the NVM clock providing timing for accessing the NVM cell array;
- a second clock;
- and
- a controller, the controller coupled to the NVM cell array, to the second clock, and to the NVM clock, the controller comprising circuitry configured to cause the controller to initiate operation of the NVM clock, to obtain a count of a frequency of a NVM clock based on the second clock, to compare the count to an acceptable range, and, in response to the count being within the acceptable range, to allow access to the NVM cell array to proceed.
Dependencies are inferred from the claim text.