Top-to bottom path rendering with opacity testing
AssigneeNVIDIA Corporation
InventorMark J. Kilgard
Life of this patent
Estimating the term…
Abstract
One embodiment of the present invention sets forth a technique for rendering paths by first generating a stencil buffer indicating pixels of the path that should be covered and then covering the path. The paths may be filled or stroked without tessellating the paths. Path rendering may be accelerated when a graphics processing unit or other processor that is configured to perform operations to generate the stencil buffer and cover the path to fill or stroke the path. When the paths are rendered in a top-to-bottom (front-to-back) order, an opacity stencil may be generated and used to avoid determining path coverage and shading for pixels that are opaque.
Claims20
A method of rendering paths in top-to-bottom order, the method comprising:
- receiving a top path including top path geometry and top path covering geometry;
- generating, by rendering the top path geometry, path cover stencil buffer state indicating samples of the top path to be covered;
- determining, during rendering the top path covering geometry with stencil testing, surviving pixels that are covered by the top path based on a stencil buffer that includes the path cover stencil buffer state and opacity stencil buffer state;
- updating the opacity stencil buffer state for the surviving pixels;
- and
- shading the surviving pixels to produce a rendered image of the top path.
A system for rendering paths in top-to-bottom order, the system comprising:
- a memory that is configured to store a stencil buffer that includes a path cover stencil buffer state and an opacity stencil buffer state;
- and
- a processor that is coupled to the memory and configured to:
- receive a top path including top path geometry and top path covering geometry;
- generate, by rendering the top path geometry, the path cover stencil buffer state indicating samples of the top path to be covered;
- determine, during rendering the top path covering geometry with stencil testing, surviving pixels that are covered by the top path based on the stencil buffer;
- update the opacity stencil buffer state for the surviving pixels;
- and
- shade the surviving pixels to produce a rendered image of the top path.
A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to render paths in top-to-bottom order, by performing the steps of:
- receiving a top path including top path geometry and top path covering geometry;
- generating, by rendering the top path geometry, path cover stencil buffer state indicating samples of the top path to be covered;
- determining, during rendering the top path covering geometry with stencil testing, surviving pixels that are covered by the top path based on a stencil buffer that includes the path cover stencil buffer state and opacity stencil buffer state;
- updating the opacity stencil buffer state for the surviving pixels;
- and
- shading the surviving pixels to produce a rendered image of the top path.
Dependencies are inferred from the claim text.