System and method of determining high speed resonance due to coupling from broadside layers
AssigneeDell Products L.P.
InventorsBhyrav M. Mutnury, Arun R. Chada
Life of this patent
Estimating the term…
Abstract
A method includes providing, on a printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length, determining a time delay associated with the first unit cell length and the second unit cell length, estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as f floquet = 1 2 t delay , where ffloquet is the floquet frequency, and tdelay is the time delay, and comparing the estimated floquet frequency with a first interface frequency associated with the first trace.
Claims18
A method comprising:
- providing, on a first printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length;
- determining a time delay associated with the first unit cell length and with the second unit cell length;
- estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as
- f
- floquet
- =
- 1
- 2
-
-
- t
- delay
- ,
- where ffloquet is the floquet frequency, and tdelay is the time delay;
- comparing the estimated floquet frequency with a first interface frequency associated with the first trace;
- and
- redesigning the first circuit trace in response to comparing the estimated floquet frequency with the first interface frequency.
A non-transitory computer-readable medium including code for performing a method, the method comprising:
- providing, on a first printed circuit board, a first circuit trace having a first unit cell length and a second circuit trace having a second unit cell length;
- determining a time delay associated with the first unit cell length and with the second unit cell length;
- estimating a floquet frequency associated with the time delay, where the floquet frequency is determined as
- f
- floquet
- =
- 1
- 2
-
-
- t
- delay
- ,
- where ffloquet is the floquet frequency, and tdelay is the time delay;
- comparing the estimated floquet frequency with a first interface frequency associated with the first trace;
- and
- redesigning the first circuit trace in response to comparing the estimated floquet frequency with the first interface frequency.
An information handling system comprising:
- a memory for storing code;
- and
- a processor operable to execute code to:
- determine a time delay associated with a first unit cell length of a first circuit trace on a first printed circuit board and with the second unit cell length of a second circuit trace on the first printed circuit board;
- estimate a floquet frequency associated with the time delay, where the floquet frequency is determined as
- f
- floquet
- =
- 1
- 2
-
-
- t
- delay
- ,
- where ffloquet is the floquet frequency, and tdelay is the time delay;
- compare the estimated floquet frequency with a first interface frequency associated with the first trace;
- and
- redesign the first circuit trace in response to comparing the estimated floquet frequency with the first interface frequency.
Dependencies are inferred from the claim text.