Automatic comparison and performance analysis between different implementations

A non-transitory medium storing instructions for causing a computing device to compare execution of a standalone code implementation and a simulation, the non-transitory medium comprises the instructions for:

• generating automatically, by a processor of a host computer, the standalone code implementation from the simulation using specification information for a target computing platform, the simulation being a model representing a design;
• representing the standalone code implementation and the simulation in an executable comparison block diagram model on the host computer, where
• the standalone code implementation is represented by one or more standalone code blocks of the comparison block diagram model,
• the simulation is represented by one or more simulation blocks of the comparison block diagram model, and
• at least one source block of the comparison block diagram model provides a same input to
• the one or more standalone code blocks that represent the standalone code implementation, and
• the one or more simulation blocks that represent the simulation;
• identifying a first intermediate output in the simulation and a second intermediate output in the standalone code implementation;
• providing a switching mechanism at the standalone code implementation in the executable comparison block diagram model, the switching mechanism configured to specify whether a next portion of the standalone code implementation receives the first intermediate output from the simulation, or the second intermediate output;
• instructing the simulation to execute on the host computer and the standalone code implementation to execute on the target computing platform simultaneously in a locked-step manner;
• and
• automatically comparing, by the processor, at least one value of the first intermediate output with at least one value of the second intermediate output during execution of the simulation and the standalone code implementation.

An apparatus comprising:

• a memory configured to store a simulation that is a model representing a design;
• and
• a processor of a host computer coupled to the memory, the processor configured to:
• generate automatically a standalone code implementation from the simulation;
• construct automatically an executable comparison block diagram model representing the standalone code implementation and the simulation, where
• the standalone code implementation is represented by one or more standalone code blocks of the comparison block diagram model,
• the simulation is represented by one or more simulation blocks of the comparison block diagram model, and
• at least one source block of the comparison block diagram model provides a same input to
• the one or more standalone code blocks that represent the standalone code implementation, and
• the one or more simulation blocks that represent the simulation;
• identify a first intermediate output in the simulation and a second intermediate output in the standalone code implementation;
• providing a switching mechanism at the standalone code implementation in the executable comparison block diagram model, the switching mechanism configured to specify whether a next portion of the standalone code implementation receives the first intermediate output from the simulation, or the second intermediate output;
• instruct the simulation to execute on the host computer and the standalone code implementation to execute simultaneously in a locked-step manner on the target computing platform;
• and
• automatically compare at least one value of the first intermediate output with at least one value of the second intermediate output during execution of the simulation and the standalone code implementation.