Semiconductor device

A semiconductor device comprising:

• a plurality of processor elements that divide data which is contiguous in one direction among a plurality of pieces of data defined as matrix data into a plurality of data groups for processing;
• a processor element control unit that issues a data shift instruction to the processor elements;
• and
• a data transfer network that performs data transfer between the processor elements which adjoin each other in a data shift direction indicated by the data shift instruction,
• wherein each of the processor elements includes:
• a data storage unit that stores one of the data groups in an area defined by one word line address and that inputs/outputs the one of the data groups collectively in a unit of the word line address;
• a data selector that selects either of data located at a head bit line address or data located at an end bit line address in the data group in response to the data shift instruction and that outputs the selected data into the data transfer network as transfer data;
• a data shifter that shifts a bit line address at which the data group is stored to the right or to the left in response to the data shift instruction on the data group to be stored at one of the word line addresses;
• and
• a data connector that connects the data group which is shifted by the data shifter and the transfer data obtained through the data transfer network and that stores the connected data in the data storage unit;
• wherein the data transfer network is provided correspondingly to the processor elements, and includes a plurality of selectors each of which outputs the transfer data outputted from the processor elements located on the both sides of the corresponding processor element to the corresponding processor element, and wherein the selectors each select the transfer data outputted from the processor element located in the data shift direction indicated by the data shift instruction, and each output the selected data to the corresponding processor element.